soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 9 Jun 2021 16:37:16 +0000 (17:37 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 10 Jun 2021 13:29:03 +0000 (15:29 +0200)
Add support for reading the LSI DEVID register which is present in
SYSC block of RZ/G2{L,LC} SoC's.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/soc/renesas/renesas-soc.c

index 0f8eff4..8310fce 100644 (file)
@@ -56,6 +56,10 @@ static const struct renesas_family fam_rzg2 __initconst __maybe_unused = {
        .reg    = 0xfff00044,           /* PRR (Product Register) */
 };
 
+static const struct renesas_family fam_rzg2l __initconst __maybe_unused = {
+       .name   = "RZ/G2L",
+};
+
 static const struct renesas_family fam_shmobile __initconst __maybe_unused = {
        .name   = "SH-Mobile",
        .reg    = 0xe600101c,           /* CCCR (Common Chip Code Register) */
@@ -64,7 +68,7 @@ static const struct renesas_family fam_shmobile __initconst __maybe_unused = {
 
 struct renesas_soc {
        const struct renesas_family *family;
-       u8 id;
+       u32 id;
 };
 
 static const struct renesas_soc soc_rz_a1h __initconst __maybe_unused = {
@@ -131,6 +135,11 @@ static const struct renesas_soc soc_rz_g2h __initconst __maybe_unused = {
        .id     = 0x4f,
 };
 
+static const struct renesas_soc soc_rz_g2l __initconst __maybe_unused = {
+       .family = &fam_rzg2l,
+       .id     = 0x841c447,
+};
+
 static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
        .family = &fam_rcar_gen1,
 };
@@ -299,6 +308,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
 #ifdef CONFIG_ARCH_R8A779A0
        { .compatible = "renesas,r8a779a0",     .data = &soc_rcar_v3u },
 #endif
+#if defined(CONFIG_ARCH_R9A07G044)
+       { .compatible = "renesas,r9a07g044",    .data = &soc_rz_g2l },
+#endif
 #ifdef CONFIG_ARCH_SH73A0
        { .compatible = "renesas,sh73a0",       .data = &soc_shmobile_ag5 },
 #endif
@@ -348,6 +360,25 @@ static int __init renesas_soc_init(void)
                goto done;
        }
 
+       np = of_find_compatible_node(NULL, NULL, "renesas,r9a07g044-sysc");
+       if (np) {
+               chipid = of_iomap(np, 0);
+               of_node_put(np);
+
+               if (chipid) {
+                       product = readl(chipid + 0x0a04);
+                       iounmap(chipid);
+
+                       if (soc->id && (product & 0xfffffff) != soc->id) {
+                               pr_warn("SoC mismatch (product = 0x%x)\n",
+                                       product);
+                               return -ENODEV;
+                       }
+               }
+
+               goto done;
+       }
+
        /* Try PRR first, then hardcoded fallback */
        np = of_find_compatible_node(NULL, NULL, "renesas,prr");
        if (np) {