arm64: dts: qcom: sdx75: Add rpmhpd node

Add rpmhpd node and opps for this node to the SDX75 dts.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/1691415534-31820-9-git-send-email-quic_rohiagar@quicinc.com
[bjorn: include qcom-rpmpd.h as well]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index a082847..e180aa4 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -9,6 +9,8 @@
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/qcom,rpmhpd.h>
+#include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
 / {
@@ -666,6 +668,56 @@
                                clock-names = "xo";
                                #clock-cells = <1>;
                        };
+
+                       rpmhpd: power-controller {
+                               compatible = "qcom,sdx75-rpmhpd";
+                               #power-domain-cells = <1>;
+                               operating-points-v2 = <&rpmhpd_opp_table>;
+
+                               rpmhpd_opp_table: opp-table {
+                                       compatible = "operating-points-v2";
+
+                                       rpmhpd_opp_ret: opp-16 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
+                                       };
+
+                                       rpmhpd_opp_min_svs: opp-48 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
+                                       };
+
+                                       rpmhpd_opp_low_svs: opp-64 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+                                       };
+
+                                       rpmhpd_opp_svs: opp-128 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+                                       };
+
+                                       rpmhpd_opp_svs_l1: opp-192 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+                                       };
+
+                                       rpmhpd_opp_nom: opp-256 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+                                       };
+
+                                       rpmhpd_opp_nom_l1: opp-320 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+                                       };
+
+                                       rpmhpd_opp_nom_l2: opp-336 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
+                                       };
+
+                                       rpmhpd_opp_turbo: opp-384 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+                                       };
+
+                                       rpmhpd_opp_turbo_l1: opp-416 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+                                       };
+                               };
+                       };
                };
 
                cpufreq_hw: cpufreq@17d91000 {