[RISCV] Fix missing addi in test to validate lower inline asm m with offset

diff --git a/llvm/test/CodeGen/RISCV/inline-asm.ll b/llvm/test/CodeGen/RISCV/inline-asm.ll
index ba78d722a16dd211c45db7f11a7283dbe37e8a0e..22d382517ccdf0c8cb4fe335078a9ac444d5e7ab 100644 (file)
--- a/llvm/test/CodeGen/RISCV/inline-asm.ll
+++ b/llvm/test/CodeGen/RISCV/inline-asm.ll
@@ -93,6 +93,8 @@ define i32 @constraint_m_with_offset(ptr %a) nounwind {
 ;
 ; RV64I-LABEL: constraint_m_with_offset:
 ; RV64I:       # %bb.0:
+; RV64I-NEXT:    addi a0, a0, 4
+; RV64I-NEXT:    #APP
 ; RV64I-NEXT:    lw a0, 0(a0)
 ; RV64I-NEXT:    #NO_APP
 ; RV64I-NEXT:    ret