gas/testsuite/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* gas/i386/i386.exp: Run "x86-64-addr32-intel" and
	"x86-64-rip-intel".

	* gas/i386/intelok.d: Updated.

	* gas/i386/x86-64-addr32-intel.d: New file.
	* gas/i386/x86-64-rip-intel.d: Likewise.

opcodes/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* i386-dis.c (print_insn): Also swap the order of op_riprel
	when swapping op_index.  Break when the RIP relative address
	is printed.
	(OP_E): Properly handle RIP relative addressing and print the
	explicit zero displacement for Intel mode.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4253c44..4c6ff29 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/4429
+       * gas/i386/i386.exp: Run "x86-64-addr32-intel" and
+       "x86-64-rip-intel".
+
+       * gas/i386/intelok.d: Updated.
+
+       * gas/i386/x86-64-addr32-intel.d: New file.
+       * gas/i386/x86-64-rip-intel.d: Likewise.
+
 2007-04-24  Andreas Krebbel  <krebbel1@de.ibm.com>
 
        * gas/s390/zarch-z9-ec.d: Add pfpo, ectg and csst.

diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index e701a8d..bda75bd 100644 (file)
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -138,9 +138,11 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
 
     run_dump_test "x86_64"
     run_dump_test "x86-64-addr32"
+    run_dump_test "x86-64-addr32-intel"
     run_dump_test "x86-64-opcode"
     run_dump_test "x86-64-pcrel"
     run_dump_test "x86-64-rip"
+    run_dump_test "x86-64-rip-intel"
     run_dump_test "x86-64-stack"
     run_dump_test "x86-64-stack-intel"
     run_dump_test "x86-64-stack-suffix"

diff --git a/gas/testsuite/gas/i386/intelok.d b/gas/testsuite/gas/i386/intelok.d
index 8e7fdbf..4231171 100644 (file)
--- a/gas/testsuite/gas/i386/intelok.d
+++ b/gas/testsuite/gas/i386/intelok.d
@@ -106,10 +106,10 @@ Disassembly of section .text:
 [      ]*[0-9a-f]+:    8b 40 12[       ]+mov[  ]+eax,(DWORD PTR )?\[eax\+18\]
 [      ]*[0-9a-f]+:    8b 04 85 02 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
 [      ]*[0-9a-f]+:    8b 04 85 02 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
-[      ]*[0-9a-f]+:    8b 04 45 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[eax\*2\]
-[      ]*[0-9a-f]+:    8b 04 45 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[eax\*2\]
-[      ]*[0-9a-f]+:    8b 04 8d 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[ecx\*4\]
-[      ]*[0-9a-f]+:    8b 04 8d 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[ecx\*4\]
+[      ]*[0-9a-f]+:    8b 04 45 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[eax\*2\+(0x)?0]
+[      ]*[0-9a-f]+:    8b 04 45 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[eax\*2\+(0x)?0]
+[      ]*[0-9a-f]+:    8b 04 8d 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[ecx\*4\+(0x)?0]
+[      ]*[0-9a-f]+:    8b 04 8d 00 00 00 00[   ]+mov[  ]+eax,(DWORD PTR )?\[ecx\*4\+(0x)?0]
 [      ]*[0-9a-f]+:    8b 40 01[       ]+mov[  ]+eax,(DWORD PTR )?\[eax\+1\]
 [      ]*[0-9a-f]+:    8b 40 01[       ]+mov[  ]+eax,(DWORD PTR )?\[eax\+1\]
 [      ]*[0-9a-f]+:    8b 44 08 fb[    ]+mov[  ]+eax,(DWORD PTR )?\[eax\+ecx\-5\]
@@ -153,11 +153,11 @@ Disassembly of section .text:
 [      ]*[0-9a-f]+:    b8 00 00 00 00[         ]+mov[  ]+eax,0x0
 [      ]*[0-9a-f]+:    b8 00 00 00 00[         ]+mov[  ]+eax,0x0
 [      ]*[0-9a-f]+:    b8 00 00 00 00[         ]+mov[  ]+eax,0x0
-[      ]*[0-9a-f]+:    8b 80 00 00 00 00[      ]+mov[  ]+eax,(DWORD PTR )?\[eax\]
+[      ]*[0-9a-f]+:    8b 80 00 00 00 00[      ]+mov[  ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
 [      ]*[0-9a-f]+:    8b 40 01[       ]+mov[  ]+eax,(DWORD PTR )?\[eax\+1]
-[      ]*[0-9a-f]+:    8b 80 00 00 00 00[      ]+mov[  ]+eax,(DWORD PTR )?\[eax\]
+[      ]*[0-9a-f]+:    8b 80 00 00 00 00[      ]+mov[  ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
 [      ]*[0-9a-f]+:    8b 80 01 00 00 00[      ]+mov[  ]+eax,(DWORD PTR )?\[eax\+(0x)?1\]
-[      ]*[0-9a-f]+:    8b 80 00 00 00 00[      ]+mov[  ]+eax,(DWORD PTR )?\[eax\]
+[      ]*[0-9a-f]+:    8b 80 00 00 00 00[      ]+mov[  ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
 [      ]*[0-9a-f]+:    8b 40 01[       ]+mov[  ]+eax,(DWORD PTR )?\[eax\+1\]
 [      ]*[0-9a-f]+:    a1 01 00 00 00[         ]+mov[  ]+eax,ds:0x1
 [      ]*[0-9a-f]+:    a1 ff ff ff ff[         ]+mov[  ]+eax,ds:0xffffffff

diff --git a/gas/testsuite/gas/i386/x86-64-addr32-intel.d b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
new file mode 100644 (file)
index 0000000..90858dc
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
@@ -0,0 +1,23 @@
+#as: -J
+#objdump: -drwMintel
+#name: x86-64 32-bit addressing (Intel mode)
+#source: x86-64-addr32.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[       ]*0:[   ]+67 48 8d 80 00 00 00 00[      ]+addr32[       ]+lea[         ]+rax,\[[re]ax\+(0x)?0\].*
+[       ]*8:[   ]+67 49 8d 80 00 00 00 00[      ]+addr32[       ]+lea[         ]+rax,\[r8d?\+(0x)?0\].*
+[       ]*10:[  ]+67 48 8d 05 00 00 00 00[      ]+addr32[       ]+lea[         ]+rax,\[[re]ip\+(0x)?0\].*
+[       ]*18:[  ]+67 48 8d 04 25 00 00 00 00[   ]+addr32[       ]+lea[         ]+rax,ds:0x0.*
+[       ]*21:[  ]+67 a0 98 08 60 00[    ]+addr32[       ]+mov[         ]+al,ds:0x600898
+[       ]*27:[  ]+67 66 a1 98 08 60 00[         ]+addr32[       ]+mov[         ]+ax,ds:0x600898
+[       ]*2e:[  ]+67 a1 98 08 60 00[    ]+addr32[       ]+mov[         ]+eax,ds:0x600898
+[       ]*34:[  ]+67 48 a1 98 08 60 00[         ]+addr32[       ]+mov[         ]+rax,ds:0x600898
+[       ]*3b:[  ]+67 a2 98 08 60 00[    ]+addr32[       ]+mov[         ]+ds:0x600898,al
+[       ]*41:[  ]+67 66 a3 98 08 60 00[         ]+addr32[       ]+mov[         ]+ds:0x600898,ax
+[       ]*48:[  ]+67 a3 98 08 60 00[    ]+addr32[       ]+mov[         ]+ds:0x600898,eax
+[       ]*4e:[  ]+67 48 a3 98 08 60 00[         ]+addr32[       ]+mov[         ]+ds:0x600898,rax
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-rip-intel.d b/gas/testsuite/gas/i386/x86-64-rip-intel.d
new file mode 100644 (file)
index 0000000..162f654
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-rip-intel.d
@@ -0,0 +1,15 @@
+#as: -J
+#objdump: -drwMintel
+#name: x86-64 rip addressing (Intel mode)
+#source: x86-64-rip.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[       ]*0:[   ]+8d 05 00 00 00 00[    ]+lea[  ]+eax,\[rip\+0x0\][    ]*(#.*)?
+[       ]*6:[   ]+8d 05 11 11 11 11[    ]+lea[  ]+eax,\[rip\+0x11111111\][     ]*(#.*)?
+[       ]*c:[   ]+8d 05 01 00 00 00[    ]+lea[  ]+eax,\[rip\+0x1\][    ]*(#.*)?
+[       ]*12:[  ]+8d 05 00 00 00 00[    ]+lea[  ]+eax,\[rip\+0x0\][    ]*(#.*)?
+#pass

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7e30c27..3521979 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/4429
+       * i386-dis.c (print_insn): Also swap the order of op_riprel
+       when swapping op_index.  Break when the RIP relative address
+       is printed.
+       (OP_E): Properly handle RIP relative addressing and print the
+       explicit zero displacement for Intel mode.
+
 2007-04-27  Alan Modra  <amodra@bigpond.net.au>
 
        * Makefile.am: Run "make dep-am".

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 7f73705..9fd62f2 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -3773,6 +3773,8 @@ print_insn (bfd_vma pc, disassemble_info *info)
      order as the intel book; everything else is printed in reverse order.  */
   if (intel_syntax || two_source_ops)
     {
+      bfd_vma riprel;
+
       for (i = 0; i < MAX_OPERANDS; ++i)
         op_txt[i] = op_out[i];
 
@@ -3781,6 +3783,9 @@ print_insn (bfd_vma pc, disassemble_info *info)
           op_ad = op_index[i];
           op_index[i] = op_index[MAX_OPERANDS - 1 - i];
           op_index[MAX_OPERANDS - 1 - i] = op_ad;
+         riprel = op_riprel[i];
+         op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
+         op_riprel[MAX_OPERANDS - 1 - i] = riprel;
        }
     }
   else
@@ -3808,6 +3813,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
        (*info->fprintf_func) (info->stream, "        # ");
        (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
                                                + op_address[op_index[i]]), info);
+       break;
       }
   return codep - priv.the_buffer;
 }
@@ -4835,11 +4841,16 @@ OP_E (int bytemode, int sizeflag)
              }
          }
 
-      if (havebase || (havesib && (index != 4 || scale != 0)))
+      if (havebase
+         || (intel_syntax && riprel)
+         || (havesib && (index != 4 || scale != 0)))
        {
          *obufp++ = open_char;
          if (intel_syntax && riprel)
-           oappend ("rip + ");
+           {
+             set_op (disp, 1);
+             oappend ("rip");
+           }
          *obufp = '\0';
          if (havebase)
            oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
@@ -4864,9 +4875,10 @@ OP_E (int bytemode, int sizeflag)
                  oappend (scratchbuf);
                }
            }
-         if (intel_syntax && disp)
+         if (intel_syntax
+             && (disp || modrm.mod != 0 || (base & 7) == 5))
            {
-             if ((bfd_signed_vma) disp > 0)
+             if ((bfd_signed_vma) disp >= 0)
                {
                  *obufp++ = '+';
                  *obufp = '\0';