return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0);
}
+static inline const MachineInstrBuilder &
+addOffset(const MachineInstrBuilder &MIB, const MachineOperand& Offset) {
+ return MIB.addImm(1).addReg(0).addOperand(Offset).addReg(0);
+}
+
/// addRegOffset - This function is used to add a memory reference of the form
/// [Reg + Offset], i.e., one with no scale or index, but with a
/// displacement. An example is: DWORD PTR [EAX + 4].
NewMI = addOffset(BuildMI(MF, MI.getDebugLoc(), get(X86::LEA64r))
.addOperand(Dest)
.addOperand(Src),
- MI.getOperand(2).getImm());
+ MI.getOperand(2));
break;
case X86::ADD32ri:
case X86::ADD32ri8:
if (ImplicitOp.getReg() != 0)
MIB.addOperand(ImplicitOp);
- NewMI = addOffset(MIB, MI.getOperand(2).getImm());
+ NewMI = addOffset(MIB, MI.getOperand(2));
break;
}
case X86::ADD16ri:
NewMI = addOffset(BuildMI(MF, MI.getDebugLoc(), get(X86::LEA16r))
.addOperand(Dest)
.addOperand(Src),
- MI.getOperand(2).getImm());
+ MI.getOperand(2));
break;
}
--- /dev/null
+; RUN: llc -mtriple=i386-unknown-linux-gnu < %s | FileCheck %s
+
+@c = external global [1 x i32], align 4
+
+; CHECK-LABEL: fn1
+; CHECK: leal c(%eax), %ecx
+define void @fn1(i32 %k) {
+ %g = getelementptr inbounds [1 x i32], [1 x i32]* @c, i32 0, i32 %k
+ %cmp = icmp ne i32* undef, %g
+ %z = zext i1 %cmp to i32
+ store i32 %z, i32* undef, align 4
+ %cmp2 = icmp eq i32* %g, null
+ br i1 %cmp2, label %u, label %r
+
+u:
+ unreachable
+
+r:
+ ret void
+}