mfld-pmu: [REVERT ME] Ignoring UART0/1/2 on CVT platform to avoid BT Hang.

BZ: 26604

This Patch is to Ignore  D0ix requests from UART0/UART1/UART2.
Currenlty Platform is getting Fabric error when Bluetooth is turned ON/OFF.
All UART0/1/2 are under lss41, So it ignores all devices under lss41.

Change-Id: I510c5054da97a1b1b1470733fbc8ad112b7cb259
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
Reviewed-on: http://android.intel.com:8080/37836
Tested-by: Martin, LoicX <loicx.martin@intel.com>
Reviewed-by: Mansoor, Illyas <illyas.mansoor@intel.com>
Reviewed-by: Pathak, Asutosh <asutosh.pathak@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/arch/x86/platform/intel-mid/mfld-pmu.c b/arch/x86/platform/intel-mid/mfld-pmu.c
index 8a56a68..7bc8ab6 100644 (file)
--- a/arch/x86/platform/intel-mid/mfld-pmu.c
+++ b/arch/x86/platform/intel-mid/mfld-pmu.c
@@ -1732,9 +1732,15 @@ EXPORT_SYMBOL(pmu_set_lss01_to_d0i0_atomic);
 */
 static inline bool device_causing_hang(struct pci_dev *pdev)
 {
-       /* USB and SPI are currently causing platform Hang on enabling RTPM*/
+       /* USB, SPI  - causing platform Hang on enabling RTPM
+        * lss 41  -  causing Hang in platform when Bluetooth
+        * is turned ON/OFF (UART0/1/2 are under lss41).
+       */
        return ((pdev) && (pdev->device) && ((pdev->device == USB_DEVICE_ID) ||
-                        (pdev->device == SPI1_DEVICE_ID)));
+                       (pdev->device == SPI1_DEVICE_ID) ||
+                       (pdev->device == UART0_DEVICE_ID) ||
+                       (pdev->device == UART1_DEVICE_ID) ||
+                       (pdev->device == UART2_DEVICE_ID)));
 }
 
 /**

diff --git a/arch/x86/platform/intel-mid/mfld-pmu.h b/arch/x86/platform/intel-mid/mfld-pmu.h
index 26c1332..d6f3ace 100644 (file)
--- a/arch/x86/platform/intel-mid/mfld-pmu.h
+++ b/arch/x86/platform/intel-mid/mfld-pmu.h
@@ -149,6 +149,9 @@
 /* FIXME:: Avoid CVT platform to Hang on enabling RTPM*/
 #define USB_DEVICE_ID 0xe006
 #define SPI1_DEVICE_ID 0x8e1
+#define UART0_DEVICE_ID 0x8fc
+#define UART1_DEVICE_ID 0x8fd
+#define UART2_DEVICE_ID 0x8fe
 
 #define MID_PCI_INDEX_HASH_BITS                7 /*size 128*/
 #define MID_PCI_INDEX_HASH_SIZE                (1<<MID_PCI_INDEX_HASH_BITS)