Added missing semicolon
authorDiogo N. Sampaio <diogo.sampaio@arm.com>
Fri, 6 Jul 2018 10:09:04 +0000 (10:09 +0000)
committerDiogo N. Sampaio <diogo.sampaio@arm.com>
Fri, 6 Jul 2018 10:09:04 +0000 (10:09 +0000)
llvm-svn: 336428

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

index 93eaf1e..59c9026 100644 (file)
@@ -6023,8 +6023,7 @@ SDValue DAGCombiner::foldRedundantShiftedMasks(SDNode *AND) {
         break;
       } else // Same as SRL
         N0Opcode = ISD::SRL;
-      LLVM_FALLTHROUGH
-      /* fall-through */
+      LLVM_FALLTHROUGH;
     case ISD::SRL:
       CanReduce = (EffectiveOtherMask.lshr(ShiftValue) == EffectiveMask) ||
                   (EffectiveMask.shl(ShiftValue) == EffectiveOtherMask);