drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock
authorBen Skeggs <bskeggs@redhat.com>
Mon, 2 Dec 2013 22:25:04 +0000 (08:25 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 23 Jan 2014 03:38:59 +0000 (13:38 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/core/subdev/clock/base.c

index e2938a2..dd62bae 100644 (file)
@@ -182,9 +182,12 @@ nouveau_pstate_prog(struct nouveau_clock *clk, int pstatei)
        clk->pstate = pstatei;
 
        if (pfb->ram->calc) {
-               ret = pfb->ram->calc(pfb, pstate->base.domain[nv_clk_src_mem]);
-               if (ret == 0)
-                       ret = pfb->ram->prog(pfb);
+               int khz = pstate->base.domain[nv_clk_src_mem];
+               do {
+                       ret = pfb->ram->calc(pfb, khz);
+                       if (ret == 0)
+                               ret = pfb->ram->prog(pfb);
+               } while (ret > 0);
                pfb->ram->tidy(pfb);
        }