[ gas/ChangeLog ]
authorThiemo Seufer <ths@networkno.de>
Fri, 9 Jun 2006 11:53:39 +0000 (11:53 +0000)
committerThiemo Seufer <ths@networkno.de>
Fri, 9 Jun 2006 11:53:39 +0000 (11:53 +0000)
* config/tc-mips.c (mips_ip): Maintain argument count.

[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-sf32.s, gas/mips/mips32-sf32.d: New test for odd
single precision FPRs on MIPS32.
* gas/mips/mips.exp: Run them.

gas/ChangeLog
gas/testsuite/ChangeLog
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/mips32-sf32.d [new file with mode: 0644]
gas/testsuite/gas/mips/mips32-sf32.s [new file with mode: 0644]

index 3077366..a225bb0 100644 (file)
@@ -1,3 +1,7 @@
+2006-06-09  Thiemo Seufer  <ths@mips.com>
+
+       * config/tc-mips.c (mips_ip): Maintain argument count.
+
 2006-06-09  Alan Modra  <amodra@bigpond.net.au>
 
        * config/tc-iq2000.c: Include sb.h.
index 8193d52..1fd5057 100644 (file)
@@ -1,3 +1,10 @@
+2006-06-09  Thiemo Seufer  <ths@mips.com>
+            Nigel Stephens  <nigel@mips.com>
+
+       * gas/mips/mips32-sf32.s, gas/mips/mips32-sf32.d: New test for odd
+       single precision FPRs on MIPS32.
+       * gas/mips/mips.exp: Run them.
+
 2006-06-08  Thiemo Seufer  <ths@mips.com>
             Nigel Stephens  <nigel@mips.com>
 
index 3feae89..6141f00 100644 (file)
@@ -561,6 +561,8 @@ if { [istarget mips*-*-vxworks*] } {
 
     run_dump_test_arches "mips32"      [mips_arch_list_matching mips32]
 
+    run_dump_test_arches "mips32-sf32" [mips_arch_list_matching mips32]
+
     run_dump_test_arches "mips32r2"    [mips_arch_list_matching mips32r2]
     run_list_test_arches "mips32r2-ill" "-32" \
                         [mips_arch_list_matching mips32r2 gpr32]
diff --git a/gas/testsuite/gas/mips/mips32-sf32.d b/gas/testsuite/gas/mips/mips32-sf32.d
new file mode 100644 (file)
index 0000000..4de9844
--- /dev/null
@@ -0,0 +1,19 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
+#name: MIPS32 odd single-precision float registers
+#as: -32 
+
+# Check MIPS32 instruction assembly
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 3c013f80        lui     \$1,0x3f80
+0+0004 <[^>]*> 44810800        mtc1    \$1,\$f1
+0+0008 <[^>]*> c783c000        lwc1    \$f3,-16384\(\$28\)
+                       8: R_MIPS_LITERAL       \.lit4\+0x4000
+0+000c <[^>]*> 46030940        add.s   \$f5,\$f1,\$f3
+0+0010 <[^>]*> 46003a21        cvt.d.s \$f8,\$f7
+0+0014 <[^>]*> 46803a21        cvt.d.w \$f8,\$f7
+0+0018 <[^>]*> 462041e0        cvt.s.d \$f7,\$f8
+0+001c <[^>]*> 462041cd        trunc.w.d       \$f7,\$f8
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/mips32-sf32.s b/gas/testsuite/gas/mips/mips32-sf32.s
new file mode 100644 (file)
index 0000000..68b7e4e
--- /dev/null
@@ -0,0 +1,14 @@
+
+       .text
+func:
+       .set noreorder
+       li.s    $f1, 1.0        
+       li.s    $f3, 1.9        
+       add.s   $f5, $f1, $f3
+       cvt.d.s $f8,$f7
+       cvt.d.w $f8,$f7
+       cvt.s.d $f7,$f8
+       trunc.w.d $f7,$f8
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+      .space  8