mtd: onenand_base: Adjust indentation in onenand_read_ops_nolock
authorNathan Chancellor <natechancellor@gmail.com>
Mon, 9 Dec 2019 21:44:23 +0000 (14:44 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 14 Feb 2020 21:34:18 +0000 (16:34 -0500)
commit 0e7ca83e82d021c928dadf4c13c137d57337540d upstream.

Clang warns:

../drivers/mtd/nand/onenand/onenand_base.c:1269:3: warning: misleading
indentation; statement is not part of the previous 'if'
[-Wmisleading-indentation]
        while (!ret) {
        ^
../drivers/mtd/nand/onenand/onenand_base.c:1266:2: note: previous
statement is here
        if (column + thislen > writesize)
        ^
1 warning generated.

This warning occurs because there is a space before the tab of the while
loop. There are spaces at the beginning of a lot of the lines in this
block, remove them so that the indentation is consistent with the Linux
kernel coding style and clang no longer warns.

Fixes: a8de85d55700 ("[MTD] OneNAND: Implement read-while-load")
Link: https://github.com/ClangBuiltLinux/linux/issues/794
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mtd/nand/onenand/onenand_base.c

index 77bd32a..9e81cd9 100644 (file)
@@ -1248,44 +1248,44 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
 
        stats = mtd->ecc_stats;
 
-       /* Read-while-load method */
+       /* Read-while-load method */
 
-       /* Do first load to bufferRAM */
-       if (read < len) {
-               if (!onenand_check_bufferram(mtd, from)) {
+       /* Do first load to bufferRAM */
+       if (read < len) {
+               if (!onenand_check_bufferram(mtd, from)) {
                        this->command(mtd, ONENAND_CMD_READ, from, writesize);
-                       ret = this->wait(mtd, FL_READING);
-                       onenand_update_bufferram(mtd, from, !ret);
+                       ret = this->wait(mtd, FL_READING);
+                       onenand_update_bufferram(mtd, from, !ret);
                        if (mtd_is_eccerr(ret))
                                ret = 0;
-               }
-       }
+               }
+       }
 
        thislen = min_t(int, writesize, len - read);
        column = from & (writesize - 1);
        if (column + thislen > writesize)
                thislen = writesize - column;
 
-       while (!ret) {
-               /* If there is more to load then start next load */
-               from += thislen;
-               if (read + thislen < len) {
+       while (!ret) {
+               /* If there is more to load then start next load */
+               from += thislen;
+               if (read + thislen < len) {
                        this->command(mtd, ONENAND_CMD_READ, from, writesize);
-                       /*
-                        * Chip boundary handling in DDP
-                        * Now we issued chip 1 read and pointed chip 1
+                       /*
+                        * Chip boundary handling in DDP
+                        * Now we issued chip 1 read and pointed chip 1
                         * bufferram so we have to point chip 0 bufferram.
-                        */
-                       if (ONENAND_IS_DDP(this) &&
-                           unlikely(from == (this->chipsize >> 1))) {
-                               this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
-                               boundary = 1;
-                       } else
-                               boundary = 0;
-                       ONENAND_SET_PREV_BUFFERRAM(this);
-               }
-               /* While load is going, read from last bufferRAM */
-               this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
+                        */
+                       if (ONENAND_IS_DDP(this) &&
+                           unlikely(from == (this->chipsize >> 1))) {
+                               this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
+                               boundary = 1;
+                       } else
+                               boundary = 0;
+                       ONENAND_SET_PREV_BUFFERRAM(this);
+               }
+               /* While load is going, read from last bufferRAM */
+               this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 
                /* Read oob area if needed */
                if (oobbuf) {
@@ -1301,24 +1301,24 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
                        oobcolumn = 0;
                }
 
-               /* See if we are done */
-               read += thislen;
-               if (read == len)
-                       break;
-               /* Set up for next read from bufferRAM */
-               if (unlikely(boundary))
-                       this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
-               ONENAND_SET_NEXT_BUFFERRAM(this);
-               buf += thislen;
+               /* See if we are done */
+               read += thislen;
+               if (read == len)
+                       break;
+               /* Set up for next read from bufferRAM */
+               if (unlikely(boundary))
+                       this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
+               ONENAND_SET_NEXT_BUFFERRAM(this);
+               buf += thislen;
                thislen = min_t(int, writesize, len - read);
-               column = 0;
-               cond_resched();
-               /* Now wait for load */
-               ret = this->wait(mtd, FL_READING);
-               onenand_update_bufferram(mtd, from, !ret);
+               column = 0;
+               cond_resched();
+               /* Now wait for load */
+               ret = this->wait(mtd, FL_READING);
+               onenand_update_bufferram(mtd, from, !ret);
                if (mtd_is_eccerr(ret))
                        ret = 0;
-       }
+       }
 
        /*
         * Return success, if no ECC failures, else -EBADMSG