arm64/sysreg: Convert OSECCR_EL1 to automatic generation

Convert OSECCR_EL1 to automatic generation as per DDI0601 2023-03, no
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Link: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v2-7-4c6add1f6257@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index d9711f1..23a17da 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
 #define SYS_SVCR_SMSTART_SM_EL0                sys_reg(0, 3, 4, 3, 3)
 #define SYS_SVCR_SMSTOP_SMZA_EL0       sys_reg(0, 3, 4, 6, 3)
 
-#define SYS_OSECCR_EL1                 sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)             sys_reg(2, 0, 0, n, 4)
 #define SYS_DBGBCRn_EL1(n)             sys_reg(2, 0, 0, n, 5)
 #define SYS_DBGWVRn_EL1(n)             sys_reg(2, 0, 0, n, 6)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index e18ae1d..4146278 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -93,6 +93,11 @@ Res0 63:32
 Field  31:0    DTRTX
 EndSysreg
 
+Sysreg OSECCR_EL1      2       0       0       6       2
+Res0   63:32
+Field  31:0    EDECCR
+EndSysreg
+
 Sysreg OSLAR_EL1       2       0       1       0       4
 Res0   63:1
 Field  0       OSLK