rtw88: 8723d: add interface configurations table
authorPing-Ke Shih <pkshih@realtek.com>
Mon, 4 May 2020 10:50:10 +0000 (18:50 +0800)
committerKalle Valo <kvalo@codeaurora.org>
Wed, 6 May 2020 08:35:04 +0000 (11:35 +0300)
Interface configuration table is used to configure PCI PHY that are
normally decided by design or bootstrap pin, and driver can do additional
settings by this table.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200504105010.10780-9-yhchuang@realtek.com
drivers/net/wireless/realtek/rtw88/rtw8723d.c

index b6266b2..92c742d 100644 (file)
@@ -1048,6 +1048,26 @@ static const struct rtw_rqpn rqpn_table_8723d[] = {
         RTW_DMA_MAPPING_EXTRA, RTW_DMA_MAPPING_HIGH},
 };
 
+static const struct rtw_intf_phy_para pcie_gen1_param_8723d[] = {
+       {0x0008, 0x4a22,
+        RTW_IP_SEL_PHY,
+        RTW_INTF_PHY_CUT_ALL,
+        RTW_INTF_PHY_PLATFORM_ALL},
+       {0x0009, 0x1000,
+        RTW_IP_SEL_PHY,
+        ~(RTW_INTF_PHY_CUT_A | RTW_INTF_PHY_CUT_B),
+        RTW_INTF_PHY_PLATFORM_ALL},
+       {0xFFFF, 0x0000,
+        RTW_IP_SEL_PHY,
+        RTW_INTF_PHY_CUT_ALL,
+        RTW_INTF_PHY_PLATFORM_ALL},
+};
+
+static const struct rtw_intf_phy_para_table phy_para_table_8723d = {
+       .gen1_para      = pcie_gen1_param_8723d,
+       .n_gen1_para    = ARRAY_SIZE(pcie_gen1_param_8723d),
+};
+
 static const struct rtw_hw_reg rtw8723d_dig[] = {
        [0] = { .addr = 0xc50, .mask = 0x7f },
        [1] = { .addr = 0xc50, .mask = 0x7f },
@@ -1098,6 +1118,7 @@ struct rtw_chip_info rtw8723d_hw_spec = {
        .pwr_off_seq = card_disable_flow_8723d,
        .page_table = page_table_8723d,
        .rqpn_table = rqpn_table_8723d,
+       .intf_table = &phy_para_table_8723d,
        .dig = rtw8723d_dig,
        .dig_cck = rtw8723d_dig_cck,
        .rf_sipi_addr = {0x840, 0x844},