radeonsi: add padding to si_resource to fix Viewperf2020/catiav5test1 perf

This is needed after the previous commit.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 992a1ce..10f1c0f 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -308,6 +308,11 @@ enum si_coherency
 struct si_resource {
    struct threaded_resource b;
 
+   /* If we remove this seemingly useless padding, performance in Viewperf2020/catiav5test1
+    * decreases by 8%.
+    */
+   uint32_t _pad;
+
    /* Winsys objects. */
    struct pb_buffer *buf;
    uint64_t gpu_address;