arm64: dts: ls2088ardb: add PHY nodes for the CS4340 PHYs
authorIoana Ciornei <ioana.ciornei@nxp.com>
Fri, 30 Oct 2020 11:35:51 +0000 (13:35 +0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 30 Nov 2020 14:30:29 +0000 (22:30 +0800)
Annotate the EMDIO1 node and describe the 4 10GBASER PHYs found on the
LS2088ARDB board. Also, add phy-handles for DPMACs 1-4 to their
associated PHY.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts

index f6b4d75..a4b0dca 100644 (file)
                stdout-path = "serial1:115200n8";
        };
 };
+
+&dpmac1 {
+       phy-handle = <&mdio1_phy1>;
+       phy-connection-type = "10gbase-r";
+};
+
+&dpmac2 {
+       phy-handle = <&mdio1_phy2>;
+       phy-connection-type = "10gbase-r";
+};
+
+&dpmac3 {
+       phy-handle = <&mdio1_phy3>;
+       phy-connection-type = "10gbase-r";
+};
+
+&dpmac4 {
+       phy-handle = <&mdio1_phy4>;
+       phy-connection-type = "10gbase-r";
+};
+
+&emdio1 {
+       status = "okay";
+
+       mdio1_phy1: ethernet-phy@10 {
+               compatible = "ethernet-phy-id13e5.1002";
+               reg = <0x10>;
+       };
+
+       mdio1_phy2: ethernet-phy@11 {
+               compatible = "ethernet-phy-id13e5.1002";
+               reg = <0x11>;
+       };
+
+       mdio1_phy3: ethernet-phy@12 {
+               compatible = "ethernet-phy-id13e5.1002";
+               reg = <0x12>;
+       };
+
+       mdio1_phy4: ethernet-phy@13 {
+               compatible = "ethernet-phy-id13e5.1002";
+               reg = <0x13>;
+       };
+};