arm64: dts: ls1088ardb: update PHY nodes with IRQ information
authorIoana Ciornei <ioana.ciornei@nxp.com>
Tue, 15 Jun 2021 16:03:37 +0000 (19:03 +0300)
committerShawn Guo <shawnguo@kernel.org>
Sat, 14 Aug 2021 04:39:27 +0000 (12:39 +0800)
Describe the IRQs for both the QSGMII PHYs and the 10GBASE-R PHY found
on the LS1088ARDB board.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts

index bf7b43a..1bfbce6 100644 (file)
        status = "okay";
 
        mdio1_phy5: ethernet-phy@c {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0xc>;
        };
 
        mdio1_phy6: ethernet-phy@d {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0xd>;
        };
 
        mdio1_phy7: ethernet-phy@e {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0xe>;
        };
 
        mdio1_phy8: ethernet-phy@f {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0xf>;
        };
 
        mdio1_phy1: ethernet-phy@1c {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0x1c>;
        };
 
        mdio1_phy2: ethernet-phy@1d {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0x1d>;
        };
 
        mdio1_phy3: ethernet-phy@1e {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0x1e>;
        };
 
        mdio1_phy4: ethernet-phy@1f {
+               interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
                reg = <0x1f>;
        };
 };
 
        mdio2_aquantia_phy: ethernet-phy@0 {
                compatible = "ethernet-phy-ieee802.3-c45";
+               interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
                reg = <0x0>;
        };
 };