dt-bindings: clock: Add bindings for Exynos850 CMU_APM

CMU_APM generates clocks for APM IP-core (Active Power Management). In
particular it generates RTC clocks, which are needed to enable rtc-s3c
driver on Exynos850 SoC.

Add clock indices and binding documentation for CMU_APM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-2-semen.protsenko@linaro.org

diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
index 7f8c91a..5618cfa 100644 (file)
--- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
@@ -32,6 +32,7 @@ properties:
   compatible:
     enum:
       - samsung,exynos850-cmu-top
+      - samsung,exynos850-cmu-apm
       - samsung,exynos850-cmu-core
       - samsung,exynos850-cmu-dpu
       - samsung,exynos850-cmu-hsi
@@ -72,6 +73,24 @@ allOf:
       properties:
         compatible:
           contains:
+            const: samsung,exynos850-cmu-apm
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: CMU_APM bus clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_clkcmu_apm_bus
+
+  - if:
+      properties:
+        compatible:
+          contains:
             const: samsung,exynos850-cmu-core
 
     then:

diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h
index 8999184..df3978b 100644 (file)
--- a/include/dt-bindings/clock/exynos850.h
+++ b/include/dt-bindings/clock/exynos850.h
@@ -55,7 +55,34 @@
 #define CLK_GOUT_PERI_BUS              43
 #define CLK_GOUT_PERI_UART             44
 #define CLK_GOUT_PERI_IP               45
-#define TOP_NR_CLK                     46
+#define CLK_MOUT_CLKCMU_APM_BUS                46
+#define CLK_DOUT_CLKCMU_APM_BUS                47
+#define CLK_GOUT_CLKCMU_APM_BUS                48
+#define TOP_NR_CLK                     49
+
+/* CMU_APM */
+#define CLK_RCO_I3C_PMIC               1
+#define OSCCLK_RCO_APM                 2
+#define CLK_RCO_APM__ALV               3
+#define CLK_DLL_DCO                    4
+#define CLK_MOUT_APM_BUS_USER          5
+#define CLK_MOUT_RCO_APM_I3C_USER      6
+#define CLK_MOUT_RCO_APM_USER          7
+#define CLK_MOUT_DLL_USER              8
+#define CLK_MOUT_CLKCMU_CHUB_BUS       9
+#define CLK_MOUT_APM_BUS               10
+#define CLK_MOUT_APM_I3C               11
+#define CLK_DOUT_CLKCMU_CHUB_BUS       12
+#define CLK_DOUT_APM_BUS               13
+#define CLK_DOUT_APM_I3C               14
+#define CLK_GOUT_CLKCMU_CMGP_BUS       15
+#define CLK_GOUT_CLKCMU_CHUB_BUS       16
+#define CLK_GOUT_RTC_PCLK              17
+#define CLK_GOUT_TOP_RTC_PCLK          18
+#define CLK_GOUT_I3C_PCLK              19
+#define CLK_GOUT_I3C_SCLK              20
+#define CLK_GOUT_SPEEDY_PCLK           21
+#define APM_NR_CLK                     22
 
 /* CMU_HSI */
 #define CLK_MOUT_HSI_BUS_USER          1