ARM: rmobile: Enable RPC on Salvator-X, ULCB, Ebisu
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Sat, 29 Jul 2017 19:28:50 +0000 (21:28 +0200)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Sat, 26 Sep 2020 15:25:42 +0000 (17:25 +0200)
Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965
Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF
accessible, mainline ATF is mandatory and must be built with
RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for
development and testing convenience only and must be disabled
in deployment for platform security reasons.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
14 files changed:
arch/arm/dts/r8a77950-salvator-x-u-boot.dts
arch/arm/dts/r8a77950-ulcb-u-boot.dts
arch/arm/dts/r8a77960-salvator-x-u-boot.dts
arch/arm/dts/r8a77960-ulcb-u-boot.dts
arch/arm/dts/r8a77965-salvator-x-u-boot.dts
arch/arm/dts/r8a77965-ulcb-u-boot.dts
arch/arm/dts/r8a77990-ebisu-u-boot.dts
arch/arm/dts/r8a77995-draak-u-boot.dts
configs/r8a77990_ebisu_defconfig
configs/rcar3_salvator-x_defconfig
configs/rcar3_ulcb_defconfig
include/configs/ebisu.h
include/configs/salvator-x.h
include/configs/ulcb.h

index e039e33..36c8a44 100644 (file)
@@ -8,6 +8,11 @@
 #include "r8a77950-salvator-x.dts"
 #include "r8a77950-u-boot.dtsi"
 
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
+
 &sdhi0 {
        sd-uhs-sdr12;
        sd-uhs-sdr25;
index b7f26c1..d3191c5 100644 (file)
        };
 };
 
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
+
 &sdhi0 {
        sd-uhs-sdr12;
        sd-uhs-sdr25;
index d3b0924..439fd6c 100644 (file)
@@ -8,6 +8,11 @@
 #include "r8a77960-salvator-x.dts"
 #include "r8a77960-u-boot.dtsi"
 
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
+
 &sdhi0 {
        sd-uhs-sdr12;
        sd-uhs-sdr25;
index bd1d634..aab9c95 100644 (file)
        };
 };
 
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
+
 &sdhi0 {
        sd-uhs-sdr12;
        sd-uhs-sdr25;
index d6f0708..8cbef83 100644 (file)
@@ -8,6 +8,11 @@
 #include "r8a77965-salvator-x.dts"
 #include "r8a77965-u-boot.dtsi"
 
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
+
 &sdhi0 {
        sd-uhs-sdr12;
        sd-uhs-sdr25;
index 954d8b6..38966bf 100644 (file)
        };
 };
 
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
+
 &sdhi0 {
        sd-uhs-sdr12;
        sd-uhs-sdr25;
index 0ea0cc9..6afc0be 100644 (file)
        };
 };
 
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
+
 &sdhi0 {
        sd-uhs-sdr12;
        sd-uhs-sdr25;
index 2f53970..10fb9cb 100644 (file)
@@ -7,3 +7,8 @@
 
 #include "r8a77995-draak.dts"
 #include "r8a77995-u-boot.dtsi"
+
+&rpc {
+       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+       status = "okay";
+};
index efdb8e6..f94d425 100644 (file)
@@ -49,6 +49,11 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_CFI_FLASH=y
+CONFIG_RENESAS_RPC_HF=y
 CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
index 0fbd1e0..4537b52 100644 (file)
@@ -52,6 +52,11 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_CFI_FLASH=y
+CONFIG_RENESAS_RPC_HF=y
 CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
index 710b2f4..b90b9e1 100644 (file)
@@ -52,6 +52,11 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_CFI_FLASH=y
+CONFIG_RENESAS_RPC_HF=y
 CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
index 06cbb03..ee9ddb1 100644 (file)
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_FLASH_SHOW_PROGRESS     45
+#define CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_SYS_FLASH_BANKS_LIST    { 0x08000000 }
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_CFI_WIDTH     FLASH_CFI_16BIT
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT      1
+#define CONFIG_SYS_MAX_FLASH_SECT      256
+#define CONFIG_SYS_WRITE_SWAPPED_DATA
+
 #endif /* __EBISU_H */
index 240df9c..db06fa5 100644 (file)
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_FLASH_SHOW_PROGRESS     45
+#define CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_SYS_FLASH_BANKS_LIST    { 0x08000000 }
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_CFI_WIDTH     FLASH_CFI_16BIT
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT      1
+#define CONFIG_SYS_MAX_FLASH_SECT      256
+#define CONFIG_SYS_WRITE_SWAPPED_DATA
+
 #endif /* __SALVATOR_X_H */
index 15fb627..165c82d 100644 (file)
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_FLASH_SHOW_PROGRESS     45
+#define CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_SYS_FLASH_BANKS_LIST    { 0x08000000 }
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_CFI_WIDTH     FLASH_CFI_16BIT
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT      1
+#define CONFIG_SYS_MAX_FLASH_SECT      256
+#define CONFIG_SYS_WRITE_SWAPPED_DATA
+
 #endif /* __ULCB_H */