[S5PC100] add SROMC(SROM Controller) register in s5pc1xx.h

diff --git a/include/s5pc1xx.h b/include/s5pc1xx.h
index f684687..aae52a7 100644 (file)
--- a/include/s5pc1xx.h
+++ b/include/s5pc1xx.h
@@ -71,7 +71,7 @@
 #define S5P_CLK_DIV3   S5P_CLKREG(0x30c)
 #define S5P_CLK_DIV0   S5P_CLKREG(0x300)
 
-#define S5P_CLK_OUT    S5P_CLKREG(0x400)
+#define S5P_CLK_OUT            S5P_CLKREG(0x400)
 
 #define S5P_CLK_GATE_D00       S5P_CLKREG(0x500)
 #define S5P_CLK_GATE_D01       S5P_CLKREG(0x504)
@@ -1222,11 +1222,31 @@
 
 
 /* SROM */
+#define S5P_SROMC_BASE(x)      (S5P_PA_SROMC + (x))
+
+#define SROM_BW_OFFSET         0x0
+#define SROM_BC0_OFFSET                0x04
+#define SROM_BC1_OFFSET                0x08
+#define SROM_BC2_OFFSET                0x0c
+#define SROM_BC3_OFFSET                0x10
+#define SROM_BC4_OFFSET                0x14
+#define SROM_BC5_OFFSET                0x18
+
+#define S5P_SROM_BW                    S5P_SROMC_BASE(SROM_BW_OFFSET)
+#define S5P_SROM_BC0           S5P_SROMC_BASE(SROM_BC0_OFFSET)
+#define S5P_SROM_BC1           S5P_SROMC_BASE(SROM_BC1_OFFSET)
+#define S5P_SROM_BC2           S5P_SROMC_BASE(SROM_BC2_OFFSET)
+#define S5P_SROM_BC3           S5P_SROMC_BASE(SROM_BC3_OFFSET)
+#define S5P_SROM_BC4           S5P_SROMC_BASE(SROM_BC4_OFFSET)
+#define S5P_SROM_BC5           S5P_SROMC_BASE(SROM_BC5_OFFSET)
+
 
 /* OneNand */
 
 
 
+
+
 /*
  * Timer 
  * : PWM, Watchdog, System timer, RTC