[Test] One CodeGen test showing missing opportunity on move elimination

diff --git a/llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll b/llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll
new file mode 100644 (file)
index 0000000..510301d
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll
@@ -0,0 +1,44 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+
+; TODO: We can get rid of movq here by using different offset and %rax.
+define i32 @test(i32* %p, i64 %len, i32 %x) {
+; CHECK-LABEL: test:
+; CHECK:       ## %bb.0: ## %entry
+; CHECK-NEXT:    movq %rsi, %rax
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  LBB0_1: ## %loop
+; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    subq $1, %rax
+; CHECK-NEXT:    jb LBB0_4
+; CHECK-NEXT:  ## %bb.2: ## %backedge
+; CHECK-NEXT:    ## in Loop: Header=BB0_1 Depth=1
+; CHECK-NEXT:    cmpl %edx, -4(%rdi,%rsi,4)
+; CHECK-NEXT:    movq %rax, %rsi
+; CHECK-NEXT:    jne LBB0_1
+; CHECK-NEXT:  ## %bb.3: ## %failure
+; CHECK-NEXT:    ud2
+; CHECK-NEXT:  LBB0_4: ## %exit
+; CHECK-NEXT:    movl $-1, %eax
+; CHECK-NEXT:    retq
+entry:
+  br label %loop
+
+loop:                                             ; preds = %backedge, %entry
+  %iv = phi i64 [ %iv.next, %backedge ], [ %len, %entry ]
+  %iv.next = add nsw i64 %iv, -1
+  %cond_1 = icmp eq i64 %iv, 0
+  br i1 %cond_1, label %exit, label %backedge
+
+backedge:                                         ; preds = %loop
+  %addr = getelementptr inbounds i32, i32* %p, i64 %iv.next
+  %loaded = load atomic i32, i32* %addr unordered, align 4
+  %cond_2 = icmp eq i32 %loaded, %x
+  br i1 %cond_2, label %failure, label %loop
+
+exit:                                             ; preds = %loop
+  ret i32 -1
+
+failure:                                          ; preds = %backedge
+  unreachable
+}