ARM: dts: at91: sama7g5: add shdwc node

Add shutdown controller node and enable it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210823131915.23857-5-claudiu.beznea@microchip.com

diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts
index 4cbed98..8b13b03 100644 (file)
--- a/arch/arm/boot/dts/at91-sama7g5ek.dts
+++ b/arch/arm/boot/dts/at91-sama7g5ek.dts
@@ -634,6 +634,15 @@
        pinctrl-0 = <&pinctrl_sdmmc2_default>;
 };
 
+&shdwc {
+       atmel,shdwc-debouncer = <976>;
+       status = "okay";
+
+       input@0 {
+               reg = <0>;
+       };
+};
+
 &spdifrx {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spdifrx_default>;

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index 3a4315a..e50806c 100644 (file)
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -122,6 +122,17 @@
                        clock-names = "td_slck", "md_slck", "main_xtal";
                };
 
+               shdwc: shdwc@e001d010 {
+                       compatible = "microchip,sama7g5-shdwc", "syscon";
+                       reg = <0xe001d010 0x10>;
+                       clocks = <&clk32k 0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       atmel,wakeup-rtc-timer;
+                       atmel,wakeup-rtt-timer;
+                       status = "disabled";
+               };
+
                rtt: rtt@e001d020 {
                        compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
                        reg = <0xe001d020 0x30>;