#define SDMMC_CLKCR_HWFC_EN BIT(17)
#define SDMMC_CLKCR_DDR BIT(18)
#define SDMMC_CLKCR_BUSSPEED BIT(19)
-#define SDMMC_CLKCR_SELCLKRX GENMASK(21, 20)
+#define SDMMC_CLKCR_SELCLKRX_MASK GENMASK(21, 20)
+#define SDMMC_CLKCR_SELCLKRX_CK 0
+#define SDMMC_CLKCR_SELCLKRX_CKIN BIT(20)
+#define SDMMC_CLKCR_SELCLKRX_FBCK BIT(21)
/* SDMMC_CMD register */
#define SDMMC_CMD_CMDINDEX GENMASK(5, 0)
priv->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE;
if (dev_read_bool(dev, "st,dirpol"))
priv->pwr_reg_msk |= SDMMC_POWER_DIRPOL;
+ if (dev_read_bool(dev, "st,pin-ckin"))
+ priv->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN;
ret = clk_get_by_index(dev, 0, &priv->clk);
if (ret)