ASoC: SOF: Introduce a new set_pm_gate() IPC PM op
authorRander Wang <rander.wang@intel.com>
Tue, 14 Feb 2023 10:33:41 +0000 (12:33 +0200)
committerMark Brown <broonie@kernel.org>
Tue, 14 Feb 2023 13:25:11 +0000 (13:25 +0000)
Set_pm_gate depends on ipc version. This patch defines
the ops for both IPC3 and IPC4.

Signed-off-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20230214103345.30669-2-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/ipc3.c
sound/soc/sof/ipc4.c
sound/soc/sof/sof-priv.h

index 8e93635..3de64ea 100644 (file)
@@ -1077,10 +1077,28 @@ static int sof_ipc3_ctx_restore(struct snd_sof_dev *sdev)
        return sof_ipc3_ctx_ipc(sdev, SOF_IPC_PM_CTX_RESTORE);
 }
 
+static int sof_ipc3_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
+{
+       struct sof_ipc_pm_gate pm_gate;
+       struct sof_ipc_reply reply;
+
+       memset(&pm_gate, 0, sizeof(pm_gate));
+
+       /* configure pm_gate ipc message */
+       pm_gate.hdr.size = sizeof(pm_gate);
+       pm_gate.hdr.cmd = SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_GATE;
+       pm_gate.flags = flags;
+
+       /* send pm_gate ipc to dsp */
+       return sof_ipc_tx_message_no_pm(sdev->ipc, &pm_gate, sizeof(pm_gate),
+                                       &reply, sizeof(reply));
+}
+
 static const struct sof_ipc_pm_ops ipc3_pm_ops = {
        .ctx_save = sof_ipc3_ctx_save,
        .ctx_restore = sof_ipc3_ctx_restore,
        .set_core_state = sof_ipc3_set_core_state,
+       .set_pm_gate = sof_ipc3_set_pm_gate,
 };
 
 const struct sof_ipc_ops ipc3_ops = {
index f3c0c83..b27ec16 100644 (file)
@@ -656,9 +656,22 @@ static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev)
        return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false);
 }
 
+static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
+{
+       struct sof_ipc4_msg msg = {{0}};
+
+       msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX);
+       msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
+       msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
+       msg.extension = flags;
+
+       return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true);
+}
+
 static const struct sof_ipc_pm_ops ipc4_pm_ops = {
        .ctx_save = sof_ipc4_ctx_save,
        .set_core_state = sof_ipc4_set_core_state,
+       .set_pm_gate = sof_ipc4_set_pm_gate,
 };
 
 static int sof_ipc4_init(struct snd_sof_dev *sdev)
index 14f7adb..5f91916 100644 (file)
@@ -425,11 +425,13 @@ struct sof_ipc_fw_tracing_ops {
  * @ctx_save:          Optional function pointer for context save
  * @ctx_restore:       Optional function pointer for context restore
  * @set_core_state:    Optional function pointer for turning on/off a DSP core
+ * @set_pm_gate:       Optional function pointer for pm gate settings
  */
 struct sof_ipc_pm_ops {
        int (*ctx_save)(struct snd_sof_dev *sdev);
        int (*ctx_restore)(struct snd_sof_dev *sdev);
        int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on);
+       int (*set_pm_gate)(struct snd_sof_dev *sdev, u32 flags);
 };
 
 /**