arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values

Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
  - CMT,
  - SDHI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f14fde21270bf8269a61a75fc6e50af2765f2a42.1663164707.git.geert+renesas@glider.be

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 8539013..ed9400f 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -247,7 +247,7 @@
 
                cmt0: timer@e60f0000 {
                        compatible = "renesas,r8a779a0-cmt0",
-                                    "renesas,rcar-gen3-cmt0";
+                                    "renesas,rcar-gen4-cmt0";
                        reg = <0 0xe60f0000 0 0x1004>;
                        interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
@@ -260,7 +260,7 @@
 
                cmt1: timer@e6130000 {
                        compatible = "renesas,r8a779a0-cmt1",
-                                    "renesas,rcar-gen3-cmt1";
+                                    "renesas,rcar-gen4-cmt1";
                        reg = <0 0xe6130000 0 0x1004>;
                        interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
@@ -279,7 +279,7 @@
 
                cmt2: timer@e6140000 {
                        compatible = "renesas,r8a779a0-cmt1",
-                                    "renesas,rcar-gen3-cmt1";
+                                    "renesas,rcar-gen4-cmt1";
                        reg = <0 0xe6140000 0 0x1004>;
                        interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
@@ -298,7 +298,7 @@
 
                cmt3: timer@e6148000 {
                        compatible = "renesas,r8a779a0-cmt1",
-                                    "renesas,rcar-gen3-cmt1";
+                                    "renesas,rcar-gen4-cmt1";
                        reg = <0 0xe6148000 0 0x1004>;
                        interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
@@ -2065,7 +2065,7 @@
 
                mmc0: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a779a0",
-                                    "renesas,rcar-gen3-sdhi";
+                                    "renesas,rcar-gen4-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>;