clk: Convert to using %pOF instead of full_name
authorRob Herring <robh@kernel.org>
Tue, 18 Jul 2017 21:42:52 +0000 (16:42 -0500)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 21 Jul 2017 22:49:54 +0000 (15:49 -0700)
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
25 files changed:
drivers/clk/berlin/bg2.c
drivers/clk/berlin/bg2q.c
drivers/clk/clk-asm9260.c
drivers/clk/clk-conf.c
drivers/clk/clk-moxart.c
drivers/clk/clk-qoriq.c
drivers/clk/clk-stm32f4.c
drivers/clk/clk-xgene.c
drivers/clk/clk.c
drivers/clk/clkdev.c
drivers/clk/mediatek/clk-cpumux.c
drivers/clk/mediatek/clk-mtk.c
drivers/clk/mediatek/reset.c
drivers/clk/renesas/clk-mstp.c
drivers/clk/renesas/clk-rcar-gen2.c
drivers/clk/sunxi-ng/ccu-sun5i.c
drivers/clk/sunxi-ng/ccu-sun6i-a31.c
drivers/clk/sunxi-ng/ccu-sun8i-a23.c
drivers/clk/sunxi-ng/ccu-sun8i-a33.c
drivers/clk/sunxi-ng/ccu-sun8i-h3.c
drivers/clk/sunxi-ng/ccu-sun8i-r.c
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
drivers/clk/sunxi/clk-sunxi.c
drivers/clk/tegra/clk-emc.c
drivers/clk/ti/clockdomain.c

index 1d99292..e7331ac 100644 (file)
@@ -679,8 +679,7 @@ static void __init berlin2_clock_setup(struct device_node *np)
                if (!IS_ERR(hws[n]))
                        continue;
 
-               pr_err("%s: Unable to register leaf clock %d\n",
-                      np->full_name, n);
+               pr_err("%pOF: Unable to register leaf clock %d\n", np, n);
                goto bg2_fail;
        }
 
index 3b784b5..67c270b 100644 (file)
@@ -304,14 +304,14 @@ static void __init berlin2q_clock_setup(struct device_node *np)
 
        gbase = of_iomap(parent_np, 0);
        if (!gbase) {
-               pr_err("%s: Unable to map global base\n", np->full_name);
+               pr_err("%pOF: Unable to map global base\n", np);
                return;
        }
 
        /* BG2Q CPU PLL is not part of global registers */
        cpupll_base = of_iomap(parent_np, 1);
        if (!cpupll_base) {
-               pr_err("%s: Unable to map cpupll base\n", np->full_name);
+               pr_err("%pOF: Unable to map cpupll base\n", np);
                iounmap(gbase);
                return;
        }
@@ -376,8 +376,7 @@ static void __init berlin2q_clock_setup(struct device_node *np)
                if (!IS_ERR(hws[n]))
                        continue;
 
-               pr_err("%s: Unable to register leaf clock %d\n",
-                      np->full_name, n);
+               pr_err("%pOF: Unable to register leaf clock %d\n", np, n);
                goto bg2q_fail;
        }
 
index ea85685..bf0582c 100644 (file)
@@ -338,8 +338,8 @@ static void __init asm9260_acc_init(struct device_node *np)
                if (!IS_ERR(hws[n]))
                        continue;
 
-               pr_err("%s: Unable to register leaf clock %d\n",
-                               np->full_name, n);
+               pr_err("%pOF: Unable to register leaf clock %d\n",
+                               np, n);
                goto fail;
        }
 
index 7ec3672..49819b5 100644 (file)
@@ -23,8 +23,8 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
        num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
                                                 "#clock-cells");
        if (num_parents == -EINVAL)
-               pr_err("clk: invalid value of clock-parents property at %s\n",
-                      node->full_name);
+               pr_err("clk: invalid value of clock-parents property at %pOF\n",
+                      node);
 
        for (index = 0; index < num_parents; index++) {
                rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
@@ -41,8 +41,8 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
                pclk = of_clk_get_from_provider(&clkspec);
                if (IS_ERR(pclk)) {
                        if (PTR_ERR(pclk) != -EPROBE_DEFER)
-                               pr_warn("clk: couldn't get parent clock %d for %s\n",
-                                       index, node->full_name);
+                               pr_warn("clk: couldn't get parent clock %d for %pOF\n",
+                                       index, node);
                        return PTR_ERR(pclk);
                }
 
@@ -57,8 +57,8 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
                clk = of_clk_get_from_provider(&clkspec);
                if (IS_ERR(clk)) {
                        if (PTR_ERR(clk) != -EPROBE_DEFER)
-                               pr_warn("clk: couldn't get assigned clock %d for %s\n",
-                                       index, node->full_name);
+                               pr_warn("clk: couldn't get assigned clock %d for %pOF\n",
+                                       index, node);
                        rc = PTR_ERR(clk);
                        goto err;
                }
@@ -102,8 +102,8 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
                        clk = of_clk_get_from_provider(&clkspec);
                        if (IS_ERR(clk)) {
                                if (PTR_ERR(clk) != -EPROBE_DEFER)
-                                       pr_warn("clk: couldn't get clock %d for %s\n",
-                                               index, node->full_name);
+                                       pr_warn("clk: couldn't get clock %d for %pOF\n",
+                                               index, node);
                                return PTR_ERR(clk);
                        }
 
index 1f66ccb..58428d0 100644 (file)
@@ -30,7 +30,7 @@ static void __init moxart_of_pll_clk_init(struct device_node *node)
 
        base = of_iomap(node, 0);
        if (!base) {
-               pr_err("%s: of_iomap failed\n", node->full_name);
+               pr_err("%pOF: of_iomap failed\n", node);
                return;
        }
 
@@ -39,13 +39,13 @@ static void __init moxart_of_pll_clk_init(struct device_node *node)
 
        ref_clk = of_clk_get(node, 0);
        if (IS_ERR(ref_clk)) {
-               pr_err("%s: of_clk_get failed\n", node->full_name);
+               pr_err("%pOF: of_clk_get failed\n", node);
                return;
        }
 
        hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1);
        if (IS_ERR(hw)) {
-               pr_err("%s: failed to register clock\n", node->full_name);
+               pr_err("%pOF: failed to register clock\n", node);
                return;
        }
 
@@ -70,7 +70,7 @@ static void __init moxart_of_apb_clk_init(struct device_node *node)
 
        base = of_iomap(node, 0);
        if (!base) {
-               pr_err("%s: of_iomap failed\n", node->full_name);
+               pr_err("%pOF: of_iomap failed\n", node);
                return;
        }
 
@@ -83,13 +83,13 @@ static void __init moxart_of_apb_clk_init(struct device_node *node)
 
        pll_clk = of_clk_get(node, 0);
        if (IS_ERR(pll_clk)) {
-               pr_err("%s: of_clk_get failed\n", node->full_name);
+               pr_err("%pOF: of_clk_get failed\n", node);
                return;
        }
 
        hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, 1, div);
        if (IS_ERR(hw)) {
-               pr_err("%s: failed to register clock\n", node->full_name);
+               pr_err("%pOF: failed to register clock\n", node);
                return;
        }
 
index 0e7de00..b0ea753 100644 (file)
@@ -1366,8 +1366,7 @@ static void __init clockgen_init(struct device_node *np)
        }
 
        if (i == ARRAY_SIZE(chipinfo)) {
-               pr_err("%s: unknown clockgen node %s\n", __func__,
-                      np->full_name);
+               pr_err("%s: unknown clockgen node %pOF\n", __func__, np);
                goto err;
        }
        clockgen.info = chipinfo[i];
@@ -1380,8 +1379,8 @@ static void __init clockgen_init(struct device_node *np)
                if (guts) {
                        clockgen.guts = of_iomap(guts, 0);
                        if (!clockgen.guts) {
-                               pr_err("%s: Couldn't map %s regs\n", __func__,
-                                      guts->full_name);
+                               pr_err("%s: Couldn't map %pOF regs\n", __func__,
+                                      guts);
                        }
                }
 
index 68e2a4e..96c6b6b 100644 (file)
@@ -1541,8 +1541,8 @@ static void __init stm32f4_rcc_init(struct device_node *np)
                    base + gd->offset, gd->bit_idx, 0, &stm32f4_clk_lock);
 
                if (IS_ERR(clks[idx])) {
-                       pr_err("%s: Unable to register leaf clock %s\n",
-                              np->full_name, gd->name);
+                       pr_err("%pOF: Unable to register leaf clock %s\n",
+                              np, gd->name);
                        goto fail;
                }
        }
index bc37030..4c75821 100644 (file)
@@ -192,7 +192,7 @@ static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_ty
 
        reg = of_iomap(np, 0);
        if (reg == NULL) {
-               pr_err("Unable to map CSR register for %s\n", np->full_name);
+               pr_err("Unable to map CSR register for %pOF\n", np);
                return;
        }
        of_property_read_string(np, "clock-output-names", &clk_name);
@@ -409,12 +409,12 @@ static void xgene_pmdclk_init(struct device_node *np)
        /* Parse the DTS register for resource */
        rc = of_address_to_resource(np, 0, &res);
        if (rc != 0) {
-               pr_err("no DTS register for %s\n", np->full_name);
+               pr_err("no DTS register for %pOF\n", np);
                return;
        }
        csr_reg = of_iomap(np, 0);
        if (!csr_reg) {
-               pr_err("Unable to map resource for %s\n", np->full_name);
+               pr_err("Unable to map resource for %pOF\n", np);
                return;
        }
        of_property_read_string(np, "clock-output-names", &clk_name);
@@ -703,16 +703,14 @@ static void __init xgene_devclk_init(struct device_node *np)
                rc = of_address_to_resource(np, i, &res);
                if (rc != 0) {
                        if (i == 0) {
-                               pr_err("no DTS register for %s\n",
-                                       np->full_name);
+                               pr_err("no DTS register for %pOF\n", np);
                                return;
                        }
                        break;
                }
                map_res = of_iomap(np, i);
                if (map_res == NULL) {
-                       pr_err("Unable to map resource %d for %s\n",
-                               i, np->full_name);
+                       pr_err("Unable to map resource %d for %pOF\n", i, np);
                        goto err;
                }
                if (strcmp(res.name, "div-reg") == 0)
@@ -747,8 +745,7 @@ static void __init xgene_devclk_init(struct device_node *np)
        pr_debug("Add %s clock\n", clk_name);
        rc = of_clk_add_provider(np, of_clk_src_simple_get, clk);
        if (rc != 0)
-               pr_err("%s: could register provider clk %s\n", __func__,
-                       np->full_name);
+               pr_err("%s: could register provider clk %pOF\n", __func__, np);
 
        return;
 
index fc58c52..c8d83ac 100644 (file)
@@ -3132,7 +3132,7 @@ int of_clk_add_provider(struct device_node *np,
        mutex_lock(&of_clk_mutex);
        list_add(&cp->link, &of_clk_providers);
        mutex_unlock(&of_clk_mutex);
-       pr_debug("Added clock from %s\n", np->full_name);
+       pr_debug("Added clock from %pOF\n", np);
 
        ret = of_clk_set_defaults(np, true);
        if (ret < 0)
@@ -3167,7 +3167,7 @@ int of_clk_add_hw_provider(struct device_node *np,
        mutex_lock(&of_clk_mutex);
        list_add(&cp->link, &of_clk_providers);
        mutex_unlock(&of_clk_mutex);
-       pr_debug("Added clk_hw provider from %s\n", np->full_name);
+       pr_debug("Added clk_hw provider from %pOF\n", np);
 
        ret = of_clk_set_defaults(np, true);
        if (ret < 0)
index bb8a77a..6b2f29d 100644 (file)
@@ -77,8 +77,8 @@ static struct clk *__of_clk_get_by_name(struct device_node *np,
                        break;
                } else if (name && index >= 0) {
                        if (PTR_ERR(clk) != -EPROBE_DEFER)
-                               pr_err("ERROR: could not get clock %s:%s(%i)\n",
-                                       np->full_name, name ? name : "", index);
+                               pr_err("ERROR: could not get clock %pOF:%s(%i)\n",
+                                       np, name ? name : "", index);
                        return clk;
                }
 
index 347d799..16e5677 100644 (file)
@@ -94,7 +94,7 @@ int __init mtk_clk_register_cpumuxes(struct device_node *node,
 
        regmap = syscon_node_to_regmap(node);
        if (IS_ERR(regmap)) {
-               pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
+               pr_err("Cannot find regmap for %pOF: %ld\n", node,
                       PTR_ERR(regmap));
                return PTR_ERR(regmap);
        }
index 0541df7..9c0ae42 100644 (file)
@@ -114,7 +114,7 @@ int mtk_clk_register_gates(struct device_node *node,
 
        regmap = syscon_node_to_regmap(node);
        if (IS_ERR(regmap)) {
-               pr_err("Cannot find regmap for %s: %ld\n", node->full_name,
+               pr_err("Cannot find regmap for %pOF: %ld\n", node,
                                PTR_ERR(regmap));
                return PTR_ERR(regmap);
        }
index 309049d..d3551d5 100644 (file)
@@ -72,7 +72,7 @@ void mtk_register_reset_controller(struct device_node *np,
 
        regmap = syscon_node_to_regmap(np);
        if (IS_ERR(regmap)) {
-               pr_err("Cannot find regmap for %s: %ld\n", np->full_name,
+               pr_err("Cannot find regmap for %pOF: %ld\n", np,
                                PTR_ERR(regmap));
                return;
        }
index f1617dd..500a9e4 100644 (file)
@@ -335,7 +335,7 @@ void __init cpg_mstp_add_clk_domain(struct device_node *np)
        u32 ncells;
 
        if (of_property_read_u32(np, "#power-domain-cells", &ncells)) {
-               pr_warn("%s lacks #power-domain-cells\n", np->full_name);
+               pr_warn("%pOF lacks #power-domain-cells\n", np);
                return;
        }
 
index 51a2479..0b2e56d 100644 (file)
@@ -407,8 +407,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
 
        if (rcar_rst_read_mode_pins(&cpg_mode)) {
                /* Backward-compatibility with old DT */
-               pr_warn("%s: failed to obtain mode pins from RST\n",
-                       np->full_name);
+               pr_warn("%pOF: failed to obtain mode pins from RST\n", np);
                cpg_mode = rcar_gen2_read_mode_pins();
        }
 
index 5372bf8..194d7bf 100644 (file)
@@ -976,8 +976,7 @@ static void __init sun5i_ccu_init(struct device_node *node,
 
        reg = of_io_request_and_map(node, 0, of_node_full_name(node));
        if (IS_ERR(reg)) {
-               pr_err("%s: Could not map the clock registers\n",
-                      of_node_full_name(node));
+               pr_err("%pOF: Could not map the clock registers\n", node);
                return;
        }
 
index 4d6078f..8af4348 100644 (file)
@@ -1217,8 +1217,7 @@ static void __init sun6i_a31_ccu_setup(struct device_node *node)
 
        reg = of_io_request_and_map(node, 0, of_node_full_name(node));
        if (IS_ERR(reg)) {
-               pr_err("%s: Could not map the clock registers\n",
-                      of_node_full_name(node));
+               pr_err("%pOF: Could not map the clock registers\n", node);
                return;
        }
 
index 8a753ed..d93b452 100644 (file)
@@ -716,8 +716,7 @@ static void __init sun8i_a23_ccu_setup(struct device_node *node)
 
        reg = of_io_request_and_map(node, 0, of_node_full_name(node));
        if (IS_ERR(reg)) {
-               pr_err("%s: Could not map the clock registers\n",
-                      of_node_full_name(node));
+               pr_err("%pOF: Could not map the clock registers\n", node);
                return;
        }
 
index 10b38dc..13eb5b2 100644 (file)
@@ -777,8 +777,7 @@ static void __init sun8i_a33_ccu_setup(struct device_node *node)
 
        reg = of_io_request_and_map(node, 0, of_node_full_name(node));
        if (IS_ERR(reg)) {
-               pr_err("%s: Could not map the clock registers\n",
-                      of_node_full_name(node));
+               pr_err("%pOF: Could not map the clock registers\n", node);
                return;
        }
 
index 62e4f0d..d1ab0d7 100644 (file)
@@ -1118,8 +1118,7 @@ static void __init sunxi_h3_h5_ccu_init(struct device_node *node,
 
        reg = of_io_request_and_map(node, 0, of_node_full_name(node));
        if (IS_ERR(reg)) {
-               pr_err("%s: Could not map the clock registers\n",
-                      of_node_full_name(node));
+               pr_err("%pOF: Could not map the clock registers\n", node);
                return;
        }
 
index e54816e..71feb7b 100644 (file)
@@ -290,8 +290,7 @@ static void __init sunxi_r_ccu_init(struct device_node *node,
 
        reg = of_io_request_and_map(node, 0, of_node_full_name(node));
        if (IS_ERR(reg)) {
-               pr_err("%s: Could not map the clock registers\n",
-                      of_node_full_name(node));
+               pr_err("%pOF: Could not map the clock registers\n", node);
                return;
        }
 
index a34a78d..621b1cd 100644 (file)
@@ -575,8 +575,7 @@ static void __init sun8i_v3s_ccu_setup(struct device_node *node)
 
        reg = of_io_request_and_map(node, 0, of_node_full_name(node));
        if (IS_ERR(reg)) {
-               pr_err("%s: Could not map the clock registers\n",
-                      of_node_full_name(node));
+               pr_err("%pOF: Could not map the clock registers\n", node);
                return;
        }
 
index f2c9274..aa4add5 100644 (file)
@@ -666,15 +666,14 @@ static struct clk * __init sunxi_mux_clk_setup(struct device_node *node,
 
        reg = of_iomap(node, 0);
        if (!reg) {
-               pr_err("Could not map registers for mux-clk: %s\n",
-                      of_node_full_name(node));
+               pr_err("Could not map registers for mux-clk: %pOF\n", node);
                return NULL;
        }
 
        i = of_clk_parent_fill(node, parents, SUNXI_MAX_PARENTS);
        if (of_property_read_string(node, "clock-output-names", &clk_name)) {
-               pr_err("%s: could not read clock-output-names from \"%s\"\n",
-                      __func__, of_node_full_name(node));
+               pr_err("%s: could not read clock-output-names from \"%pOF\"\n",
+                      __func__, node);
                goto out_unmap;
        }
 
@@ -797,16 +796,15 @@ static void __init sunxi_divider_clk_setup(struct device_node *node,
 
        reg = of_iomap(node, 0);
        if (!reg) {
-               pr_err("Could not map registers for mux-clk: %s\n",
-                      of_node_full_name(node));
+               pr_err("Could not map registers for mux-clk: %pOF\n", node);
                return;
        }
 
        clk_parent = of_clk_get_parent_name(node, 0);
 
        if (of_property_read_string(node, "clock-output-names", &clk_name)) {
-               pr_err("%s: could not read clock-output-names from \"%s\"\n",
-                      __func__, of_node_full_name(node));
+               pr_err("%s: could not read clock-output-names from \"%pOF\"\n",
+                      __func__, node);
                goto out_unmap;
        }
 
@@ -1010,8 +1008,7 @@ static struct clk ** __init sunxi_divs_clk_setup(struct device_node *node,
 
        reg = of_iomap(node, 0);
        if (!reg) {
-               pr_err("Could not map registers for divs-clk: %s\n",
-                      of_node_full_name(node));
+               pr_err("Could not map registers for divs-clk: %pOF\n", node);
                return NULL;
        }
 
index 74e7544..11a5066 100644 (file)
@@ -378,7 +378,7 @@ static int load_one_timing_from_dt(struct tegra_clk_emc *tegra,
 
        err = of_property_read_u32(node, "clock-frequency", &tmp);
        if (err) {
-               pr_err("timing %s: failed to read rate\n", node->full_name);
+               pr_err("timing %pOF: failed to read rate\n", node);
                return err;
        }
 
@@ -386,8 +386,7 @@ static int load_one_timing_from_dt(struct tegra_clk_emc *tegra,
 
        err = of_property_read_u32(node, "nvidia,parent-clock-frequency", &tmp);
        if (err) {
-               pr_err("timing %s: failed to read parent rate\n",
-                      node->full_name);
+               pr_err("timing %pOF: failed to read parent rate\n", node);
                return err;
        }
 
@@ -395,8 +394,7 @@ static int load_one_timing_from_dt(struct tegra_clk_emc *tegra,
 
        timing->parent = of_clk_get_by_name(node, "emc-parent");
        if (IS_ERR(timing->parent)) {
-               pr_err("timing %s: failed to get parent clock\n",
-                      node->full_name);
+               pr_err("timing %pOF: failed to get parent clock\n", node);
                return PTR_ERR(timing->parent);
        }
 
@@ -409,8 +407,8 @@ static int load_one_timing_from_dt(struct tegra_clk_emc *tegra,
                }
        }
        if (timing->parent_index == 0xff) {
-               pr_err("timing %s: %s is not a valid parent\n",
-                      node->full_name, __clk_get_name(timing->parent));
+               pr_err("timing %pOF: %s is not a valid parent\n",
+                      node, __clk_get_name(timing->parent));
                clk_put(timing->parent);
                return -EINVAL;
        }
index fbedc6a..07a8051 100644 (file)
@@ -138,8 +138,8 @@ static void __init of_ti_clockdomain_setup(struct device_node *node)
        for (i = 0; i < num_clks; i++) {
                clk = of_clk_get(node, i);
                if (IS_ERR(clk)) {
-                       pr_err("%s: Failed get %s' clock nr %d (%ld)\n",
-                              __func__, node->full_name, i, PTR_ERR(clk));
+                       pr_err("%s: Failed get %pOF' clock nr %d (%ld)\n",
+                              __func__, node, i, PTR_ERR(clk));
                        continue;
                }
                clk_hw = __clk_get_hw(clk);