int i, j;
struct pipe_ctx *pipe;
struct core_dc *core_dc = DC_TO_CORE(dc);
+
+#ifdef ENABLE_FBC
+ struct compressor *fbc_compressor = core_dc->fbc_compressor;
+#endif
+
for (i = 0; i < MAX_PIPES; i++) {
if (context != NULL)
pipe = &context->res_ctx.pipe_ctx[i];
core_dc->hwss.setup_stereo(pipe, core_dc);
}
}
+
+#ifdef ENABLE_FBC
+ if (fbc_compressor != NULL &&
+ fbc_compressor->funcs->is_fbc_enabled_in_hw(core_dc->fbc_compressor,
+ &pipe->tg->inst))
+ fbc_compressor->funcs->disable_fbc(fbc_compressor);
+
+#endif
return ret;
}
if (!stream_status)
return; /* Cannot commit surface to stream that is not committed */
+#ifdef ENABLE_FBC
+ if (srf_updates->flip_addr) {
+ if (srf_updates->flip_addr->address.grph.addr.low_part == 0)
+ ASSERT(0);
+ }
+#endif
context = core_dc->current_context;
/* update current stream with the new updates */
void dce110_compressor_enable_fbc(
struct compressor *compressor,
- uint32_t paths_num,
struct compr_addr_and_pitch_params *params)
{
struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
dm_write_reg(compressor->ctx, addr, value);
}
-bool dce110_compressor_construct(struct dce110_compressor *compressor,
- struct dc_context *ctx)
-{
-
- compressor->base.options.bits.FBC_SUPPORT = true;
-
- /* for dce 11 always use one dram channel for lpt */
- compressor->base.lpt_channels_num = 1;
- compressor->base.options.bits.DUMMY_BACKEND = false;
-
- /*
- * check if this system has more than 1 dram channel; if only 1 then lpt
- * should not be supported
- */
-
-
- compressor->base.options.bits.CLK_GATING_DISABLED = false;
-
- compressor->base.ctx = ctx;
- compressor->base.embedded_panel_h_size = 0;
- compressor->base.embedded_panel_v_size = 0;
- compressor->base.memory_bus_width = ctx->asic_id.vram_width;
- compressor->base.allocated_size = 0;
- compressor->base.preferred_requested_size = 0;
- compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
- compressor->base.options.raw = 0;
- compressor->base.banks_num = 0;
- compressor->base.raw_size = 0;
- compressor->base.channel_interleave_size = 0;
- compressor->base.dram_channels_num = 0;
- compressor->base.lpt_channels_num = 0;
- compressor->base.attached_inst = 0;
- compressor->base.is_enabled = false;
-
- return true;
-}
-
struct compressor *dce110_compressor_create(struct dc_context *ctx)
{
struct dce110_compressor *cp110 =
};
+bool dce110_compressor_construct(struct dce110_compressor *compressor,
+ struct dc_context *ctx)
+{
+
+ compressor->base.options.bits.FBC_SUPPORT = true;
+
+ /* for dce 11 always use one dram channel for lpt */
+ compressor->base.lpt_channels_num = 1;
+ compressor->base.options.bits.DUMMY_BACKEND = false;
+
+ /*
+ * check if this system has more than 1 dram channel; if only 1 then lpt
+ * should not be supported
+ */
+
+
+ compressor->base.options.bits.CLK_GATING_DISABLED = false;
+
+ compressor->base.ctx = ctx;
+ compressor->base.embedded_panel_h_size = 0;
+ compressor->base.embedded_panel_v_size = 0;
+ compressor->base.memory_bus_width = ctx->asic_id.vram_width;
+ compressor->base.allocated_size = 0;
+ compressor->base.preferred_requested_size = 0;
+ compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
+ compressor->base.options.raw = 0;
+ compressor->base.banks_num = 0;
+ compressor->base.raw_size = 0;
+ compressor->base.channel_interleave_size = 0;
+ compressor->base.dram_channels_num = 0;
+ compressor->base.lpt_channels_num = 0;
+ compressor->base.attached_inst = 0;
+ compressor->base.is_enabled = false;
+#ifdef ENABLE_FBC
+ compressor->base.funcs = &dce110_compressor_funcs;
+
+#endif
+ return true;
+}
+
#include "dce110_timing_generator.h"
#include "dce/dce_hwseq.h"
+#ifdef ENABLE_FBC
+#include "dce110_compressor.h"
+#endif
+
#include "bios/bios_parser_helper.h"
#include "timing_generator.h"
#include "mem_input.h"
power_down_controllers(dc);
power_down_clock_sources(dc);
+
+#ifdef ENABLE_FBC
+ dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
+#endif
}
static void disable_vga_and_power_gate_all_controllers(
}
set_safe_displaymarks(&context->res_ctx, dc->res_pool);
+
+#ifdef ENABLE_FBC
+ dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
+#endif
/*TODO: when pplib works*/
apply_min_clocks(dc, context, &clocks_state, true);
abm->funcs->init_backlight(abm);
abm->funcs->abm_init(abm);
}
+#ifdef ENABLE_FBC
+ dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor);
+#endif
}
void dce110_fill_display_configs(
};
struct compr_addr_and_pitch_params {
- enum controller_id controller_id;
+ /* enum controller_id controller_id; */
uint32_t inst;
uint32_t source_view_width;
uint32_t source_view_height;
struct compressor_funcs {
void (*power_up_fbc)(struct compressor *cp);
- void (*enable_fbc)(struct compressor *cp, uint32_t paths_num,
+ void (*enable_fbc)(struct compressor *cp,
struct compr_addr_and_pitch_params *params);
void (*disable_fbc)(struct compressor *cp);
void (*set_fbc_invalidation_triggers)(struct compressor *cp,
struct dc_context *ctx;
uint32_t attached_inst;
bool is_enabled;
- const struct compressor_funcs funcs;
+ const struct compressor_funcs *funcs;
union {
uint32_t raw;
struct {