sh_eth: fix TRSCER mask for R7S9210
authorSergey Shtylyov <s.shtylyov@omprussia.ru>
Sun, 28 Feb 2021 20:27:32 +0000 (23:27 +0300)
committerDavid S. Miller <davem@davemloft.net>
Mon, 1 Mar 2021 21:22:34 +0000 (13:22 -0800)
According  to the RZ/A2M Group User's Manual: Hardware, Rev. 2.00,
the TRSCER register has bit 9 reserved, hence we can't use the driver's
default TRSCER mask.  Add the explicit initializer for sh_eth_cpu_data::
trscer_err_mask for R7S9210.

Fixes: 6e0bb04d0e4f ("sh_eth: Add R7S9210 support")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/sh_eth.c

index 7f14d4aa5b3efde97db775254ac57387a9cd64d3..f029c7c03804f916e9ff134475f14ecd8a0d0058 100644 (file)
@@ -782,6 +782,8 @@ static struct sh_eth_cpu_data r7s9210_data = {
 
        .fdr_value      = 0x0000070f,
 
+       .trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5,
+
        .apr            = 1,
        .mpr            = 1,
        .tpauser        = 1,