PR gas/15082

	* tic6x-opcode-table.h: Rename mpydp's specific operand type macro
	from ORREGD1324 to ORXREGD1324 and make it cross-path-able through
	tic6x_operand_xregpair operand coding type.
	Make mpydp instruction cross-path-able, ie: remove the FIXed 'x'
	opcode field, usu ORXREGD1324 for the src2 operand and remove the
	TIC6X_FLAG_NO_CROSS.

	* gas/tic6x/insns-bad-1.s: Remove test-case for mpydp with
	cross-path.
	* gas/tic6x/insns-bad-1.l: Update expected output.
	* gas/tic6x/insns-c674x.s: Add a test-case for mpydp with
	cross-path.
	* gas/tic6x/insns-c674x.d: Update expected output.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index e1c0481..622037e 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,15 @@
 2013-03-20  Alexis Deruelle  <alexis.deruelle@gmail.com>
 
+       PR gas/15082
+       * gas/tic6x/insns-bad-1.s: Remove test-case for mpydp with
+       cross-path.
+       * gas/tic6x/insns-bad-1.l: Update expected output.
+       * gas/tic6x/insns-c674x.s: Add a test-case for mpydp with
+       cross-path.
+       * gas/tic6x/insns-c674x.d: Update expected output.
+
+2013-03-20  Alexis Deruelle  <alexis.deruelle@gmail.com>
+
        PR gas/15095
        * gas/tic6x/insns-c674x.s: Add test cases for the newly generated
        opcode.

diff --git a/gas/testsuite/gas/tic6x/insns-bad-1.l b/gas/testsuite/gas/tic6x/insns-bad-1.l
index 95f3f9b..43d283f 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-bad-1.l
+++ b/gas/testsuite/gas/tic6x/insns-bad-1.l
@@ -698,7 +698,6 @@
 [^:]*:686: Error: 'mpydp' instruction not supported on this functional unit
 [^:]*:687: Error: bad number of operands to 'mpydp'
 [^:]*:688: Error: operand 1 of 'mpydp' on wrong side
-[^:]*:689: Error: 'mpydp' instruction not supported on this functional unit
 [^:]*:690: Error: 'mpyh' instruction not supported on this functional unit
 [^:]*:691: Error: bad number of operands to 'mpyh'
 [^:]*:692: Error: operand 1 of 'mpyh' on wrong side

diff --git a/gas/testsuite/gas/tic6x/insns-bad-1.s b/gas/testsuite/gas/tic6x/insns-bad-1.s
index e2e7996..aa3c79c 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-bad-1.s
+++ b/gas/testsuite/gas/tic6x/insns-bad-1.s
@@ -686,7 +686,7 @@ f:
        mpydp .D1 a1:a0,a1:a0,a1:a0
        mpydp .M1 a1:a0,a1:a0
        mpydp .M1 b1:b0,a1:a0,a3:a2
-       mpydp .M2X b1:b0,a1:a0,b1:b0
+
        mpyh .S1 a1,a2,a3
        mpyh .M1 a1,a2
        mpyh .M1 b1,a2,a3

diff --git a/gas/testsuite/gas/tic6x/insns-c674x.d b/gas/testsuite/gas/tic6x/insns-c674x.d
index 9f8e162..b347e45 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-c674x.d
+++ b/gas/testsuite/gas/tic6x/insns-c674x.d
@@ -685,6 +685,7 @@ Disassembly of section \.text:
 [0-9a-f]+[048c] <[^>]*> 0524ac02[ \t]+mpy \.M2 5,b9,b10
 [0-9a-f]+[048c] <[^>]*> a62f9c02[ \t]+\[a2\] mpy \.M2X -4,a11,b12
 [0-9a-f]+[048c] <[^>]*> 02080700[ \t]+mpydp \.M1 a1:a0,a3:a2,a5:a4
+[0-9a-f]+[048c] <[^>]*> 00001702[ \t]+mpydp \.M2X b1:b0,a1:a0,b1:b0
 [0-9a-f]+[048c] <[^>]*> 6520c702[ \t]+\[b2\] mpydp \.M2 b7:b6,b9:b8,b11:b10
 [0-9a-f]+[048c] <[^>]*> 01040080[ \t]+mpyh \.M1 a0,a1,a2
 [0-9a-f]+[048c] <[^>]*> b2907080[ \t]+\[!a2\] mpyh \.M1X a3,b4,a5

diff --git a/gas/testsuite/gas/tic6x/insns-c674x.s b/gas/testsuite/gas/tic6x/insns-c674x.s
index 33ec5da..f969188 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-c674x.s
+++ b/gas/testsuite/gas/tic6x/insns-c674x.s
@@ -682,6 +682,7 @@ f:
        mpy .M2 5,b9,b10
        [a2] mpy .M2X -4,a11,b12
        mpydp .M1 a1:a0,a3:a2,a5:a4
+       mpydp .M2X b1:b0,a1:a0,b1:b0
        [b2] mpydp .M2 b7:b6,b9:b8,b11:b10
        mpyh .M1 a0,a1,a2
        [!a2] mpyh .M1X a3,b4,a5

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 69d0859..cc7ef5f 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,5 +1,15 @@
 2013-03-20  Alexis Deruelle  <alexis.deruelle@gmail.com>
 
+       PR gas/15082
+       * tic6x-opcode-table.h: Rename mpydp's specific operand type macro
+       from ORREGD1324 to ORXREGD1324 and make it cross-path-able through
+       tic6x_operand_xregpair operand coding type.
+       Make mpydp instruction cross-path-able, ie: remove the FIXed 'x'
+       opcode field, usu ORXREGD1324 for the src2 operand and remove the
+       TIC6X_FLAG_NO_CROSS.
+
+2013-03-20  Alexis Deruelle  <alexis.deruelle@gmail.com>
+
        PR gas/15095
        * tic6x.h (enum tic6x_coding_method): Add
        tic6x_coding_dreg_(msb|lsb) field coding type in order to encode

diff --git a/include/opcode/tic6x-opcode-table.h b/include/opcode/tic6x-opcode-table.h
index abebd3c..e9cfab9 100644 (file)
--- a/include/opcode/tic6x-opcode-table.h
+++ b/include/opcode/tic6x-opcode-table.h
@@ -75,7 +75,7 @@
 #define ORREGD12 { tic6x_operand_regpair, 8, tic6x_rw_read, 1, 1, 2, 2 }
 #define ORXREGD12 { tic6x_operand_xregpair, 8, tic6x_rw_read, 1, 1, 2, 2 }
 #define ORREGD1234 { tic6x_operand_regpair, 8, tic6x_rw_read, 1, 2, 3, 4 }
-#define ORREGD1324 { tic6x_operand_regpair, 8, tic6x_rw_read, 1, 3, 2, 4 }
+#define ORXREGD1324 { tic6x_operand_xregpair, 8, tic6x_rw_read, 1, 3, 2, 4 }
 #define OWREGD910 { tic6x_operand_regpair, 8, tic6x_rw_write, 9, 9, 10, 10 }
 #define ORCREG1 { tic6x_operand_ctrl, 4, tic6x_rw_read, 1, 1, 0, 0 }
 #define OWCREG1 { tic6x_operand_ctrl, 4, tic6x_rw_write, 1, 1, 0, 0 }
@@ -1154,11 +1154,11 @@ INSNE(mpy, m_s5_xsl16_si, m, mpy, 1616_m, C62X, 0,
       ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0),
           ENC(src2, reg, 1), ENC(dst, reg, 2)))
 
-INSN(mpydp, m, mpy, mpydp, C67X, TIC6X_FLAG_NO_CROSS,
-     FIX2(FIX(op, 0x0e), FIX(x, 0)),
-     OP3(ORREGD1234, ORREGD1324, OWREGD910),
-     ENC4(ENC(s, fu, 0), ENC(src1, reg, 0), ENC(src2, reg, 1),
-         ENC(dst, reg, 2)))
+INSN(mpydp, m, mpy, mpydp, C67X, 0,
+     FIX1(FIX(op, 0x0e)),
+     OP3(ORREGD1234, ORXREGD1324, OWREGD910),
+     ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0),
+           ENC(src2, reg, 1), ENC(dst, reg, 2)))
 
 INSN(mpyh, m, mpy, 1616_m, C62X, 0,
      FIX1(FIX(op, 0x01)),
@@ -2520,7 +2520,7 @@ INSNE(zero, d_sub, d, 1_or_2_src, 1cycle, C62X,
 #undef OWDREGD5
 #undef ORREGD12
 #undef ORXREGD12
-#undef ORREGD1234
+#undef ORXREGD1234
 #undef ORREGD1324
 #undef OWREGD910
 #undef ORCREG1