* config/h8300/h8300.md: Remove extraneous USE in expanders.

From-SVN: r76486

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 13b5c10..920959b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
 2004-01-24  Kazu Hirata  <kazu@cs.umass.edu>
 
+       * config/h8300/h8300.md: Remove extraneous USE in expanders.
+
+2004-01-24  Kazu Hirata  <kazu@cs.umass.edu>
+
        * config/h8300/h8300-protos.h: Provide prototypes for
        h8300_legitimate_constant_p and h8300_legitimate_address_p.
        * config/h8300/h8300.c (h8300_legitimate_constant_p): New.

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 12b55dc..fe21997 100644 (file)
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -153,7 +153,7 @@
    (set_attr "cc" "clobber")])
 
 (define_expand "pushqi1"
-  [(use (match_operand:QI 0 "register_operand" ""))]
+  [(match_operand:QI 0 "register_operand" "")]
   ""
   "
 {
@@ -260,7 +260,7 @@
    (set_attr "cc" "clobber")])
 
 (define_expand "pushhi1"
-  [(use (match_operand:HI 0 "register_operand" ""))]
+  [(match_operand:HI 0 "register_operand" "")]
   ""
   "
 {
@@ -1934,8 +1934,8 @@
    (set_attr "length" "4")])
 
 (define_expand "stm_h8300s_2"
-  [(use (match_operand:SI 0 "register_operand" ""))
-   (use (match_operand:SI 1 "register_operand" ""))]
+  [(match_operand:SI 0 "register_operand" "")
+   (match_operand:SI 1 "register_operand" "")]
   "TARGET_H8300S
    && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
        || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
@@ -1992,9 +1992,9 @@
    (set_attr "length" "4")])
 
 (define_expand "stm_h8300s_3"
-  [(use (match_operand:SI 0 "register_operand" ""))
-   (use (match_operand:SI 1 "register_operand" ""))
-   (use (match_operand:SI 2 "register_operand" ""))]
+  [(match_operand:SI 0 "register_operand" "")
+   (match_operand:SI 1 "register_operand" "")
+   (match_operand:SI 2 "register_operand" "")]
   "TARGET_H8300S
    && ((REGNO (operands[0]) == 0
        && REGNO (operands[1]) == 1
@@ -2056,10 +2056,10 @@
    (set_attr "length" "4")])
 
 (define_expand "stm_h8300s_4"
-  [(use (match_operand:SI 0 "register_operand" ""))
-   (use (match_operand:SI 1 "register_operand" ""))
-   (use (match_operand:SI 2 "register_operand" ""))
-   (use (match_operand:SI 3 "register_operand" ""))]
+  [(match_operand:SI 0 "register_operand" "")
+   (match_operand:SI 1 "register_operand" "")
+   (match_operand:SI 2 "register_operand" "")
+   (match_operand:SI 3 "register_operand" "")]
   "TARGET_H8300S
    && REGNO (operands[0]) == 0
    && REGNO (operands[1]) == 1
@@ -2109,8 +2109,8 @@
    (set_attr "length" "4")])
 
 (define_expand "ldm_h8300s_2"
-  [(use (match_operand:SI 0 "register_operand" ""))
-   (use (match_operand:SI 1 "register_operand" ""))]
+  [(match_operand:SI 0 "register_operand" "")
+   (match_operand:SI 1 "register_operand" "")]
   "TARGET_H8300S
    && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
        || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
@@ -2167,9 +2167,9 @@
    (set_attr "length" "4")])
 
 (define_expand "ldm_h8300s_3"
-  [(use (match_operand:SI 0 "register_operand" ""))
-   (use (match_operand:SI 1 "register_operand" ""))
-   (use (match_operand:SI 2 "register_operand" ""))]
+  [(match_operand:SI 0 "register_operand" "")
+   (match_operand:SI 1 "register_operand" "")
+   (match_operand:SI 2 "register_operand" "")]
   "TARGET_H8300S
    && ((REGNO (operands[0]) == 0
        && REGNO (operands[1]) == 1
@@ -2231,10 +2231,10 @@
    (set_attr "length" "4")])
 
 (define_expand "ldm_h8300s_4"
-  [(use (match_operand:SI 0 "register_operand" ""))
-   (use (match_operand:SI 1 "register_operand" ""))
-   (use (match_operand:SI 2 "register_operand" ""))
-   (use (match_operand:SI 3 "register_operand" ""))]
+  [(match_operand:SI 0 "register_operand" "")
+   (match_operand:SI 1 "register_operand" "")
+   (match_operand:SI 2 "register_operand" "")
+   (match_operand:SI 3 "register_operand" "")]
   "TARGET_H8300S && !TARGET_NORMAL_MODE
    && REGNO (operands[0]) == 0
    && REGNO (operands[1]) == 1