//===----------------------------------------------------------------------===//
#include "ExecuteStage.h"
-#include "Scheduler.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
+HWStallEvent::GenericEventType toHWStallEventType(Scheduler::StallKind Event) {
+ switch (Event) {
+ case Scheduler::LoadQueueFull:
+ return HWStallEvent::LoadQueueFull;
+ case Scheduler::StoreQueueFull:
+ return HWStallEvent::StoreQueueFull;
+ case Scheduler::SchedulerQueueFull:
+ return HWStallEvent::SchedulerQueueFull;
+ case Scheduler::DispatchGroupStall:
+ return HWStallEvent::DispatchGroupStall;
+ case Scheduler::NoStall:
+ return HWStallEvent::Invalid;
+ }
+
+ llvm_unreachable("Don't know how to process this StallKind!");
+}
+
bool ExecuteStage::isAvailable(const InstRef &IR) const {
- HWStallEvent::GenericEventType Event;
+ Scheduler::StallKind Event = Scheduler::NoStall;
if (HWS.canBeDispatched(IR, Event))
return true;
- notifyEvent<HWStallEvent>(HWStallEvent(Event, IR));
+ HWStallEvent::GenericEventType ET = toHWStallEventType(Event);
+ notifyEvent<HWStallEvent>(HWStallEvent(ET, IR));
return false;
}
#endif
bool Scheduler::canBeDispatched(const InstRef &IR,
- HWStallEvent::GenericEventType &Event) const {
- Event = HWStallEvent::Invalid;
+ Scheduler::StallKind &Event) const {
+ Event = StallKind::NoStall;
const InstrDesc &Desc = IR.getInstruction()->getDesc();
+ // Give lower priority to these stall events.
+ if (Desc.MayStore && LSU->isSQFull())
+ Event = StallKind::StoreQueueFull;
if (Desc.MayLoad && LSU->isLQFull())
- Event = HWStallEvent::LoadQueueFull;
- else if (Desc.MayStore && LSU->isSQFull())
- Event = HWStallEvent::StoreQueueFull;
- else {
- switch (Resources->canBeDispatched(Desc.Buffers)) {
- default:
- return true;
- case ResourceStateEvent::RS_BUFFER_UNAVAILABLE:
- Event = HWStallEvent::SchedulerQueueFull;
- break;
- case ResourceStateEvent::RS_RESERVED:
- Event = HWStallEvent::DispatchGroupStall;
- }
+ Event = StallKind::LoadQueueFull;
+
+ switch (Resources->canBeDispatched(Desc.Buffers)) {
+ case ResourceStateEvent::RS_BUFFER_UNAVAILABLE:
+ Event = StallKind::SchedulerQueueFull;
+ break;
+ case ResourceStateEvent::RS_RESERVED:
+ Event = StallKind::DispatchGroupStall;
+ break;
+ default:
+ break;
}
- return false;
+ return Event == StallKind::NoStall;
}
void Scheduler::issueInstructionImpl(
#ifndef LLVM_TOOLS_LLVM_MCA_SCHEDULER_H
#define LLVM_TOOLS_LLVM_MCA_SCHEDULER_H
-#include "HWEventListener.h"
#include "HardwareUnit.h"
#include "Instruction.h"
#include "LSUnit.h"
-#include "RetireControlUnit.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
LSU(llvm::make_unique<LSUnit>(LoadQueueSize, StoreQueueSize,
AssumeNoAlias)) {}
+ // Stalls generated by the scheduler.
+ enum StallKind {
+ NoStall,
+ LoadQueueFull,
+ StoreQueueFull,
+ SchedulerQueueFull,
+ DispatchGroupStall
+ };
+
/// Check if the instruction in 'IR' can be dispatched.
///
/// The DispatchStage is responsible for querying the Scheduler before
/// dispatching new instructions. This routine is used for performing such
/// a query. If the instruction 'IR' can be dispatched, then true is
/// returned, otherwise false is returned with Event set to the stall type.
- bool canBeDispatched(const InstRef &IR,
- HWStallEvent::GenericEventType &Event) const;
+ bool canBeDispatched(const InstRef &IR, StallKind &Event) const;
/// Returns true if there is availibility for IR in the LSU.
bool isReady(const InstRef &IR) const { return LSU->isReady(IR); }