Convert CONFIG_PHY_RESET_DELAY to Kconfig

This converts the following to Kconfig:
   CONFIG_PHY_RESET_DELAY

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/README b/README
index effaef5574c3fe48c8fa1fa8c9615d6fc4ead1dd..0072e03b6313399e5cda7b1e9a0b7f33b4f81827 100644 (file)
--- a/README
+++ b/README
@@ -1075,13 +1075,6 @@ The following options need to be configured:
 
                The clock frequency of the MII bus
 
-               CONFIG_PHY_RESET_DELAY
-
-               Some PHY like Intel LXT971A need extra delay after
-               reset before any MII register access is possible.
-               For such PHY, set this option to the usec delay
-               required. (minimum 300usec for LXT971A)
-
                CONFIG_PHY_CMD_DELAY (ppc4xx)
 
                Some PHY like Intel LXT971A need extra delay after

diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h
index 27f30d1d2e200f90f5b6575935f46ea24454dce8..327c0e06977b8610baec9446742bff8fdcc87756 100644 (file)
--- a/arch/arm/include/asm/arch-bcmcygnus/configs.h
+++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h
@@ -19,7 +19,4 @@
 #define CONFIG_SYS_NS16550_CLK_DIV     54
 #define CONFIG_SYS_NS16550_COM3                0x18023000
 
-/* Ethernet */
-#define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/
-
 #endif /* __ARCH_CONFIGS_H */

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 7d4d15ed9189019631578ac9b88ee1f7ac82ce3d..194c84e7e89d1c2515e6dec34ca55283ec9801fe 100644 (file)
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -366,7 +366,7 @@ int miiphy_reset(const char *devname, unsigned char addr)
                debug("PHY reset failed\n");
                return -1;
        }
-#ifdef CONFIG_PHY_RESET_DELAY
+#if CONFIG_PHY_RESET_DELAY > 0
        udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
 #endif
        /*

diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig
index 7eb23bdc62b72b6dcc8079e41fec952cee077fcf..95cce92e9263e000e40d6bdec5b5a1963a2a674d 100644 (file)
--- a/configs/bcm968380gerg_ram_defconfig
+++ b/configs/bcm968380gerg_ram_defconfig
@@ -49,6 +49,7 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_BRCMNAND=y
 CONFIG_NAND_BRCMNAND_6838=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_PINCTRL=y

diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig
index 45e8b765837a8bcefc40bb0d44e69d8a079d4c80..9268aea02ab17bff40976b2ad92edad5b4e96d56 100644 (file)
--- a/configs/comtrend_ar5315u_ram_defconfig
+++ b/configs/comtrend_ar5315u_ram_defconfig
@@ -50,6 +50,7 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y

diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig
index 5a944483d0623334d44d2134bd6e41a220403af7..9d2fc0cbf1c3603ef5aefc84117c5fc5f6c3b8b5 100644 (file)
--- a/configs/comtrend_ar5387un_ram_defconfig
+++ b/configs/comtrend_ar5387un_ram_defconfig
@@ -50,6 +50,7 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y

diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig
index 6290b2a7208029d3226b616a7a3c51dbfa362b1c..ddb12508bf803bd367f05f21dd603614c6e1f300 100644 (file)
--- a/configs/comtrend_ct5361_ram_defconfig
+++ b/configs/comtrend_ct5361_ram_defconfig
@@ -51,6 +51,7 @@ CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_PHY_FIXED=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y

diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig
index 35bc13964e749baec82685f7e14f8f1bfc5183e0..b2973fa0f34020ddbe288ca078c4b260646a7774 100644 (file)
--- a/configs/comtrend_vr3032u_ram_defconfig
+++ b/configs/comtrend_vr3032u_ram_defconfig
@@ -52,6 +52,7 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_BRCMNAND=y
 CONFIG_NAND_BRCMNAND_6368=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y

diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
index a2e5f9648c6b8490f435a621d858a31f2d1ebd5e..5ad85b10f500c7bc130d25959d5c1a3042f6569e 100644 (file)
--- a/configs/comtrend_wap5813n_ram_defconfig
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -50,6 +50,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_BCM6368_ETH=y

diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig
index 977450e351e171db409d0aff3ee6a0d5a650d87b..261e1bf693df5752184572d5bfbe4f2de6ad5438 100644 (file)
--- a/configs/huawei_hg556a_ram_defconfig
+++ b/configs/huawei_hg556a_ram_defconfig
@@ -51,6 +51,7 @@ CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_PHY_FIXED=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y

diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig
index b961b58ac394f2b29e542961e50f62e2c909da9b..869d4c8e4e33de06c519bd9cd3696ad7346a0240 100644 (file)
--- a/configs/netgear_cg3100d_ram_defconfig
+++ b/configs/netgear_cg3100d_ram_defconfig
@@ -45,6 +45,7 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_RESET=y
 CONFIG_RESET_BCM6345=y
 CONFIG_DM_SERIAL=y

diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig
index c3e626c9c34b1c254df9126037179a200e756660..8649f0ecd9ff03945c53a99f9a1acaea6dc8ac76 100644 (file)
--- a/configs/netgear_dgnd3700v2_ram_defconfig
+++ b/configs/netgear_dgnd3700v2_ram_defconfig
@@ -47,6 +47,7 @@ CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_BCM6368_ETH=y

diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig
index ac906a9dcf81f1dfa108a188b1e4781c0b190755..9ac5dbaae14c3589f67d02e42a82c3674ef6bb93 100644 (file)
--- a/configs/sagem_f@st1704_ram_defconfig
+++ b/configs/sagem_f@st1704_ram_defconfig
@@ -49,6 +49,7 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHY_FIXED=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_BCM6348_ETH=y
 CONFIG_DM_RESET=y

diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig
index 5caad90fe91564c6d3da5d48cef4b302d9ff35e0..e97c1f06bd7986829e818ec672525bba0bb37cd8 100644 (file)
--- a/configs/sfr_nb4-ser_ram_defconfig
+++ b/configs/sfr_nb4-ser_ram_defconfig
@@ -53,6 +53,7 @@ CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_PHY_FIXED=y
+CONFIG_PHY_RESET_DELAY=20
 CONFIG_DM_ETH=y
 CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y

diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index fa1ae108385b1b5fa118726ad3482ab336bf8358..7b40329405c97d2d8037f20dd80470b3d20e5e84 100644 (file)
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -35,6 +35,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
+CONFIG_PHY_RESET_DELAY=10000
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_CADENCE_QSPI=y

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 74339a25ca53e3a767f26cde75c633ecf9ce7256..eed6eb186692eec012c28f4537ada39e3e25deba 100644 (file)
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -330,3 +330,11 @@ config PHY_NCSI
        depends on DM_ETH
 
 endif #PHYLIB
+
+config PHY_RESET_DELAY
+       int "Extra delay after reset before MII register access"
+       default 0
+       help
+         Some PHYs need extra delay after reset before any MII register access
+         is possible.  For such PHY, set this option to the usec delay
+         required.

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index fffa10f68b3caba9e4b82e1e6fe4a7418f046ae2..92fff5b72c0c50fbc5977d55b60be60179eeeba7 100644 (file)
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -872,7 +872,7 @@ int phy_reset(struct phy_device *phydev)
                return -1;
        }
 
-#ifdef CONFIG_PHY_RESET_DELAY
+#if CONFIG_PHY_RESET_DELAY > 0
        udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
 #endif
        /*

diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h
index 57de9960956278a717c13928581758ebb7925704..0c357dea9d3b770f87fc8d2a939d367b633dbae8 100644 (file)
--- a/include/configs/bmips_common.h
+++ b/include/configs/bmips_common.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* ETH */
-#define CONFIG_PHY_RESET_DELAY         20
-
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, \
                                          230400, 500000, 1500000 }

diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index dd9421687638725cec4738a0cb94ad6abcc78740..feec8695f2ee817371cd4bc5266cff5cf7ce7ebd 100644 (file)
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -29,9 +29,6 @@
 
 #define CONFIG_DW_ALTDESCRIPTOR
 
-/* Command support defines */
-#define CONFIG_PHY_RESET_DELAY                 10000           /* in usec */
-
 /* Misc configuration */
 
 /*