{ "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
{ "rx_header_split", E1000_STAT(rx_hdr_split) },
{ "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
+ { "tx_smbus", E1000_STAT(stats.mgptc) },
+ { "rx_smbus", E1000_STAT(stats.mgprc) },
+ { "dropped_smbus", E1000_STAT(stats.mgpdc) },
};
#define E1000_QUEUE_STATS_LEN 0
adapter->phy_stats.receive_errors += phy_tmp;
}
+ /* Management Stats */
+ if (adapter->hw.has_smbus) {
+ adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
+ adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
+ adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
+ }
+
spin_unlock_irqrestore(&adapter->stats_lock, flags);
}
#ifdef CONFIG_PCI_MSI