v4l2: add imx219 support

dts: add imx219 configure

Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
index 7df4e97..fdfcaaf 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
@@ -181,6 +181,16 @@
                };
        };
 
+       csi_pins: csi-pins {
+               csi-pins-pwdn {
+                       sf,pins = <PAD_GPIO18>;
+                       sf,pinmux = <PAD_GPIO18_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <GPO_HIGH>;
+                       sf,pin-gpio-doen = <OEN_LOW>;
+               };
+       };
+
        mmc0_pins: mmc0-pins {
                 mmc0-pins-rest {
                        sf,pins = <PAD_GPIO22>;
@@ -598,6 +608,31 @@
        pinctrl-names = "default";
        pinctrl-0 = <&i2c6_pins>;
        status = "okay";
+
+       imx219@10 {
+               compatible = "imx219";
+               reg = <0x10>;
+               clocks = <&clk_ext_camera>;
+               clock-names = "xclk";
+               //reset-gpio = <&gpio 18 0>;
+               //DOVDD-supply = <&v2v8>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&csi_pins>;
+               rotation = <0>;
+               orientation = <1>; //CAMERA_ORIENTATION_BACK
+
+               port {
+                       /* CSI2 bus endpoint */
+                       imx219_to_csi2rx0: endpoint {
+                               remote-endpoint = <&csi2rx0_from_imx219>;
+                               bus-type = <4>;      /* MIPI CSI-2 D-PHY */
+                               clock-lanes = <4>;
+                               data-lanes = <0 1>;
+                               lane-polarities = <0 0 0>;
+                               link-frequencies = /bits/ 64 <456000000>;
+                       };
+               };
+       };
 };
 
 &sdio0 {
@@ -630,6 +665,33 @@
        status = "okay";
 };
 
+&vin_sysctl {
+       /* when use dvp open this pinctrl*/
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       /* CSI2 bus endpoint */
+                       csi2rx0_from_imx219: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&imx219_to_csi2rx0>;
+                               bus-type = <4>;      /* MIPI CSI-2 D-PHY */
+                               clock-lanes = <4>;
+                               data-lanes = <0 1>;
+                               lane-polarities = <0 0 0>;
+                               status = "okay";
+                       };
+               };
+       };
+};
+
 &sfctemp {
        status = "okay";
 };

diff --git a/arch/riscv/configs/starfive_visionfive2_defconfig b/arch/riscv/configs/starfive_visionfive2_defconfig
index c149c5c..7e1a730 100644 (file)
--- a/arch/riscv/configs/starfive_visionfive2_defconfig
+++ b/arch/riscv/configs/starfive_visionfive2_defconfig
@@ -185,8 +185,6 @@ CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=y
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_VIDEO_STF_VIN=y
-CONFIG_VIN_SENSOR_SC2235=y
-CONFIG_VIN_SENSOR_OV4689=y
 CONFIG_VIN_SENSOR_IMX219=y
 CONFIG_DRM=y
 CONFIG_DRM_VERISILICON=y

diff --git a/drivers/media/platform/starfive/v4l2_driver/Readme.txt b/drivers/media/platform/starfive/v4l2_driver/Readme.txt
index fc3dad6..b291f1c 100644 (file)
--- a/drivers/media/platform/starfive/v4l2_driver/Readme.txt
+++ b/drivers/media/platform/starfive/v4l2_driver/Readme.txt
@@ -4,8 +4,7 @@
 
 ensure linux/arch/riscv/configs/starfive_jh7110_defconfig:
 CONFIG_VIDEO_STF_VIN=y
-CONFIG_VIN_SENSOR_SC2235=y
-CONFIG_VIN_SENSOR_OV4689=y
+CONFIG_VIN_SENSOR_IMX219=y
 
-Only support the lane0/lane5 of dphy as clock lane, lane1/lane2/lane3/lane4
+Only support the lane4/lane5 of dphy as clock lane, lane0/lane1/lane2/lane3
 as data lane.

diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_common.h b/drivers/media/platform/starfive/v4l2_driver/stf_common.h
index 6ddf396..8793f36 100644 (file)
--- a/drivers/media/platform/starfive/v4l2_driver/stf_common.h
+++ b/drivers/media/platform/starfive/v4l2_driver/stf_common.h
@@ -9,7 +9,7 @@
 
 // #define STF_DEBUG
 
-// #define USE_CSIDPHY_ONE_CLK_MODE 1
+#define USE_CSIDPHY_ONE_CLK_MODE 1
 
 enum {
        ST_DVP = 0x0001,

diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_csi.c b/drivers/media/platform/starfive/v4l2_driver/stf_csi.c
index a07cef3..3d82598 100644 (file)
--- a/drivers/media/platform/starfive/v4l2_driver/stf_csi.c
+++ b/drivers/media/platform/starfive/v4l2_driver/stf_csi.c
@@ -374,11 +374,7 @@ int stf_csi_register(struct stf_csi_dev *csi_dev, struct v4l2_device *v4l2_dev)
        struct media_pad *pads = csi_dev->pads;
        int ret;
 
-       csi_dev->mipirx_1p8 = devm_regulator_get(dev, "mipirx_1p8");
-       if (IS_ERR(csi_dev->mipirx_1p8))
-               return PTR_ERR(csi_dev->mipirx_1p8);
-
-       csi_dev->mipirx_0p9 = devm_regulator_get(dev, "mipirx_0p9");
+       csi_dev->mipirx_0p9 = devm_regulator_get(dev, "mipi_0p9");
        if (IS_ERR(csi_dev->mipirx_0p9))
                return PTR_ERR(csi_dev->mipirx_0p9);
 

diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_csi.h b/drivers/media/platform/starfive/v4l2_driver/stf_csi.h
index a826c4b..c480b22 100644 (file)
--- a/drivers/media/platform/starfive/v4l2_driver/stf_csi.h
+++ b/drivers/media/platform/starfive/v4l2_driver/stf_csi.h
@@ -44,7 +44,6 @@ struct stf_csi_dev {
        struct csi_hw_ops *hw_ops;
        struct mutex stream_lock;
        int stream_count;
-       struct regulator *mipirx_1p8;
        struct regulator *mipirx_0p9;
 };
 

diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_csi_hw_ops.c b/drivers/media/platform/starfive/v4l2_driver/stf_csi_hw_ops.c
index d462226..687785a 100644 (file)
--- a/drivers/media/platform/starfive/v4l2_driver/stf_csi_hw_ops.c
+++ b/drivers/media/platform/starfive/v4l2_driver/stf_csi_hw_ops.c
@@ -43,32 +43,18 @@ static int stf_csi_power_on(struct stf_csi_dev *csi_dev, u8 on)
        int ret;
 
        if (on) {
-               ret = regulator_enable(csi_dev->mipirx_1p8);
-               if (ret) {
-                       st_err(ST_CSI, "Cannot enable mipirx_1p8 regulator\n");
-                       goto err_1p8;
-               }
-
                ret = regulator_enable(csi_dev->mipirx_0p9);
                if (ret) {
                        st_err(ST_CSI, "Cannot enable mipirx_0p9 regulator\n");
-                       goto err_0p9;
+                       return ret;
                }
-       } else {
-               regulator_disable(csi_dev->mipirx_1p8);
+       } else
                regulator_disable(csi_dev->mipirx_0p9);
-       }
 
        regmap_update_bits(stfcamss->stf_aon_syscon, stfcamss->aon_gp_reg,
                                BIT(31), BIT(31));
 
        return 0;
-
-err_0p9:
-       regulator_disable(csi_dev->mipirx_1p8);
-err_1p8:
-       return ret;
-
 }
 
 static int stf_csi_clk_enable(struct stf_csi_dev *csi_dev)

diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_csiphy_hw_ops.c b/drivers/media/platform/starfive/v4l2_driver/stf_csiphy_hw_ops.c
index 2dc0038..bcf52fd 100644 (file)
--- a/drivers/media/platform/starfive/v4l2_driver/stf_csiphy_hw_ops.c
+++ b/drivers/media/platform/starfive/v4l2_driver/stf_csiphy_hw_ops.c
@@ -65,12 +65,12 @@ int try_cfg(struct csi2phy_cfg2 *cfg, struct csi2phy_cfg *cfg0,
 {
        int i = 0;
 
-       cfg->clock_lane = 0;
+       cfg->clock_lane = 4;
        cfg->clock1_lane = 5;
-       cfg->data_lanes[0] = 1;
-       cfg->data_lanes[1] = 2;
-       cfg->data_lanes[2] = 3;
-       cfg->data_lanes[3] = 4;
+       cfg->data_lanes[0] = 0;
+       cfg->data_lanes[1] = 1;
+       cfg->data_lanes[2] = 2;
+       cfg->data_lanes[3] = 3;
 
        if (cfg0 && cfg1) {
                st_debug(ST_CSIPHY, "CSIPHY use 2 clk mode\n");
@@ -99,7 +99,6 @@ int try_cfg(struct csi2phy_cfg2 *cfg, struct csi2phy_cfg *cfg0,
                st_debug(ST_CSIPHY, "CSIPHY cfg0 use 1 clk mode\n");
                cfg->num_clks = 1;
                cfg->num_data_lanes = cfg0->num_data_lanes;
-               cfg->clock_lane = cfg->clock1_lane  = cfg0->clock_lane;
                cfg->lane_polarities[0] = cfg->lane_polarities[1] =
                                                cfg0->lane_polarities[0];
                for (i = 0; i < cfg0->num_data_lanes; i++) {
@@ -110,7 +109,6 @@ int try_cfg(struct csi2phy_cfg2 *cfg, struct csi2phy_cfg *cfg0,
                st_debug(ST_CSIPHY, "CSIPHY cfg1 use 1 clk mode\n");
                cfg->num_clks = 1;
                cfg->num_data_lanes = cfg1->num_data_lanes;
-               cfg->clock_lane = cfg->clock1_lane  = cfg1->clock_lane;
                cfg->lane_polarities[0] = cfg->lane_polarities[1] =
                                                cfg1->lane_polarities[0];
                for (i = 0; i < cfg1->num_data_lanes; i++) {