2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+ * gas/i386/i386.exp: Run nops and x86-64-nops.
+
+ * gas/i386/nops.d: New file.
+ * gas/i386/nops.s: Likewise.
+ * gas/i386/x86-64-nops.d: Likewise.
+ * gas/i386/x86-64-nops.s: Likewise.
+
+2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+
* gas/i386/opcode.s: Add "xchg %ax,%ax".
* gas/i386/opcode.d: Updated.
run_dump_test "rep"
run_dump_test "rep-suffix"
run_dump_test "fp"
+ run_dump_test "nops"
# These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets.
run_dump_test "x86-64-rep"
run_dump_test "x86-64-rep-suffix"
run_dump_test "x86-64-gidt"
+ run_dump_test "x86-64-nops"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]
--- /dev/null
+#objdump: -drw
+#name: i386 nops
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ ]*0:[ ]+0f 1f 00[ ]+nopl[ ]+\(%eax\)
+[ ]*3:[ ]+0f 1f 40 00[ ]+nopl[ ]+0x0\(%eax\)
+[ ]*7:[ ]+0f 1f 44 00 00[ ]+nopl[ ]+0x0\(%eax,%eax,1\)
+[ ]*c:[ ]+66 0f 1f 44 00 00[ ]+nopw[ ]+0x0\(%eax,%eax,1\)
+[ ]*12:[ ]+0f 1f 80 00 00 00 00[ ]+nopl[ ]+0x0\(%eax\)
+[ ]*19:[ ]+0f 1f 84 00 00 00 00 00[ ]+nopl[ ]+0x0\(%eax,%eax,1\)
+[ ]*21:[ ]+66 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+0x0\(%eax,%eax,1\)
+[ ]*2a:[ ]+66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%eax,%eax,1\)
+#pass
--- /dev/null
+ .text
+
+ .byte 0x0f, 0x1f, 0x0
+ .byte 0x0f, 0x1f, 0x40, 0x0
+ .byte 0x0f, 0x1f, 0x44, 0x0, 0x0
+ .byte 0x66, 0x0f, 0x1f, 0x44, 0x0, 0x0
+ .byte 0x0f, 0x1f, 0x80, 0x0, 0x0, 0x0, 0x0
+ .byte 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+ .byte 0x66, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+ .byte 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+
+ .p2align 4
--- /dev/null
+#objdump: -drw
+#name: x86-64 nops
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ ]*0:[ ]+0f 1f 00[ ]+nopl[ ]+\(%rax\)
+[ ]*3:[ ]+0f 1f 40 00[ ]+nopl[ ]+0x0\(%rax\)
+[ ]*7:[ ]+0f 1f 44 00 00[ ]+nopl[ ]+0x0\(%rax,%rax,1\)
+[ ]*c:[ ]+66 0f 1f 44 00 00[ ]+nopw[ ]+0x0\(%rax,%rax,1\)
+[ ]*12:[ ]+0f 1f 80 00 00 00 00[ ]+nopl[ ]+0x0\(%rax\)
+[ ]*19:[ ]+0f 1f 84 00 00 00 00 00[ ]+nopl[ ]+0x0\(%rax,%rax,1\)
+[ ]*21:[ ]+66 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+0x0\(%rax,%rax,1\)
+[ ]*2a:[ ]+66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%rax,%rax,1\)
+#pass
--- /dev/null
+ .text
+
+ .byte 0x0f, 0x1f, 0x0
+ .byte 0x0f, 0x1f, 0x40, 0x0
+ .byte 0x0f, 0x1f, 0x44, 0x0, 0x0
+ .byte 0x66, 0x0f, 0x1f, 0x44, 0x0, 0x0
+ .byte 0x0f, 0x1f, 0x80, 0x0, 0x0, 0x0, 0x0
+ .byte 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+ .byte 0x66, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+ .byte 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+
+ .p2align 4
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+ * i386.h (i386_optab): Add "nop" with memory reference.
+
+2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+
* i386.h (i386_optab): Update comment for 64bit NOP.
2006-06-06 Ben Elliston <bje@au.ibm.com>
{"bound", 2, 0x62, X, Cpu186|CpuNo64, wl_Suf|Modrm, { WordReg, WordMem, 0} },
{"hlt", 0, 0xf4, X, 0, NoSuf, { 0, 0, 0} },
-/* nop is actually 'xchgl %eax, %eax'. */
+
+{"nop", 1, 0x0f1f, X, Cpu686, wl_Suf|Modrm, { WordMem, 0, 0} },
+
+/* nop is actually "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
+ 32bit mode and "xchg %rax,%rax" in 64bit mode. */
{"nop", 0, 0x90, X, 0, NoSuf, { 0, 0, 0} },
/* Protection control. */
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
+ (twobyte_has_modrm): Set 1 for 0x1f.
+
+2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+
* i386-dis.c (NOP_Fixup): Removed.
(NOP_Fixup1): New.
(NOP_Fixup2): Likewise.
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "nopQ", Ev, XX, XX },
/* 20 */
{ "movZ", Rm, Cm, XX },
{ "movZ", Rm, Dm, XX },
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
/* ------------------------------- */
/* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
- /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
+ /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
/* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
/* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
/* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */