clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1
authorCodrin Ciubotariu <codrin.ciubotariu@microchip.com>
Tue, 25 Jun 2019 09:10:02 +0000 (12:10 +0300)
committerStephen Boyd <sboyd@kernel.org>
Mon, 22 Jul 2019 21:32:08 +0000 (14:32 -0700)
In clk_generated_determine_rate(), if the divisor is greater than
GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
If clk_generated_set_rate() will be called later with this wrong
rate, it will return -EINVAL, so the generated clock won't change
its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1.

Fixes: 8c7aa6328947 ("clk: at91: clk-generated: remove useless divisor loop")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/at91/clk-generated.c

index 44db83a..44a46dc 100644 (file)
@@ -141,6 +141,8 @@ static int clk_generated_determine_rate(struct clk_hw *hw,
                        continue;
 
                div = DIV_ROUND_CLOSEST(parent_rate, req->rate);
+               if (div > GENERATED_MAX_DIV + 1)
+                       div = GENERATED_MAX_DIV + 1;
 
                clk_generated_best_diff(req, parent, parent_rate, div,
                                        &best_diff, &best_rate);