drm/amdgpu: Update kgd2kfd_shared_resources for dGPU support
authorFelix Kuehling <Felix.Kuehling@amd.com>
Wed, 7 Feb 2018 01:32:36 +0000 (20:32 -0500)
committerOded Gabbay <oded.gabbay@gmail.com>
Wed, 7 Feb 2018 01:32:36 +0000 (20:32 -0500)
Add GPUVM size and DRM render node. Also add function to query the
VMID mask to avoid hard-coding it in multiple places later.

v2: cut off GPUVM size at the VA hole

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
drivers/gpu/drm/amd/include/kgd_kfd_interface.h

index 141d11d..3ec4bad 100644 (file)
@@ -30,6 +30,8 @@
 const struct kgd2kfd_calls *kgd2kfd;
 bool (*kgd2kfd_init_p)(unsigned int, const struct kgd2kfd_calls**);
 
+static const unsigned int compute_vmid_bitmap = 0xFF00;
+
 int amdgpu_amdkfd_init(void)
 {
        int ret;
@@ -137,9 +139,13 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
        int last_valid_bit;
        if (adev->kfd) {
                struct kgd2kfd_shared_resources gpu_resources = {
-                       .compute_vmid_bitmap = 0xFF00,
+                       .compute_vmid_bitmap = compute_vmid_bitmap,
                        .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec,
-                       .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe
+                       .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe,
+                       .gpuvm_size = min(adev->vm_manager.max_pfn
+                                         << AMDGPU_GPU_PAGE_SHIFT,
+                                         AMDGPU_VA_HOLE_START),
+                       .drm_render_minor = adev->ddev->render->index
                };
 
                /* this is going to have a few of the MSBs set that we need to
@@ -359,3 +365,13 @@ uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd)
 
        return amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
 }
+
+bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid)
+{
+       if (adev->kfd) {
+               if ((1 << vmid) & compute_vmid_bitmap)
+                       return true;
+       }
+
+       return false;
+}
index 833dc26..d1bab32 100644 (file)
@@ -66,6 +66,8 @@ void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev);
 struct kfd2kgd_calls *amdgpu_amdkfd_gfx_7_get_functions(void);
 struct kfd2kgd_calls *amdgpu_amdkfd_gfx_8_0_get_functions(void);
 
+bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
+
 /* Shared API */
 int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
                        void **mem_obj, uint64_t *gpu_addr,
index 9e35249..36c706a 100644 (file)
@@ -108,6 +108,12 @@ struct kgd2kfd_shared_resources {
 
        /* Number of bytes at start of aperture reserved for KGD. */
        size_t doorbell_start_offset;
+
+       /* GPUVM address space size in bytes */
+       uint64_t gpuvm_size;
+
+       /* Minor device number of the render node */
+       int drm_render_minor;
 };
 
 struct tile_config {