Add Merrifield HVP board type support
authorYunpeng Gao <yunpeng.gao@intel.com>
Sun, 1 Apr 2012 07:18:45 +0000 (15:18 +0800)
committerbuildbot <buildbot@intel.com>
Mon, 2 Apr 2012 12:59:38 +0000 (05:59 -0700)
BZ: 30074

Merrifield HVP board is different from Merrifield VP board in
quite a few components, such as storage, usb, audio and so on.
So it's necessary to add a new macro in kernel board type for
Merrifield HVP.

This patch add a new board type macro CONFIG_BOARD_MRFLD_HVP
for Merrifield HVP board and also creat a new board specific
file board-hvp.c for HVP board specific.

Change-Id: Iaac388518979dae4df7d24062572e926d3d54aed
Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com>
Reviewed-on: http://android.intel.com:8080/42033
Reviewed-by: Tang, Richard <richard.tang@intel.com>
Reviewed-by: Brouat, Claude <claude.brouat@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
arch/x86/Kconfig
arch/x86/platform/intel-mid/Makefile
arch/x86/platform/intel-mid/board-hvp.c [new file with mode: 0644]

index 6932912..13b0d7f 100644 (file)
@@ -494,6 +494,16 @@ config BOARD_MRFLD_VP
        ---help---
          Merrifield based simulation configuration. This includes:
          VP, HVP, SLE targets.
+
+config BOARD_MRFLD_HVP
+       bool "Merrifield Hybrid Virtual Platform (HVP) board type"
+       depends on X86_MRFLD
+       default n
+       ---help---
+         Merrifield HVP integrates a functionally equlvalent software.
+         model of the Merrifield North Cluster interface to the FPGA
+         implementation of the TNG South Cluster RTL in the Cypress
+         River (CR4) Board.
 endchoice
 
 endif
index ed10386..99614fd 100644 (file)
@@ -17,3 +17,4 @@ obj-$(CONFIG_BOARD_MFLD_BLACKBAY)             += board-blackbay.o
 obj-$(CONFIG_BOARD_REDRIDGE)           += board-redridge.o
 obj-$(CONFIG_BOARD_CTP)                        += board-ctp.o
 obj-$(CONFIG_BOARD_MRFLD_VP)           += board-vp.o
+obj-$(CONFIG_BOARD_MRFLD_HVP)          += board-hvp.o
diff --git a/arch/x86/platform/intel-mid/board-hvp.c b/arch/x86/platform/intel-mid/board-hvp.c
new file mode 100644 (file)
index 0000000..3beb108
--- /dev/null
@@ -0,0 +1,63 @@
+/*
+ * board-hvp.c: Intel Merrifield based board (Hybrid Virtual Platform)
+ *
+ * (C) Copyright 2012 Intel Corporation
+ * Author: Mark F. Brown <mark.f.brown@intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/intel_mid_ssp_spi.h>
+
+/* SSP5 debug port settings */
+#define SPI_MODALIAS           "spi_max3111"
+#define SPI_MAX_SPEED_HZ       3125000
+#define SPI_IRQ                        0xFF
+
+static struct intel_mid_ssp_spi_chip chip = {
+               .burst_size = DFLT_FIFO_BURST_SIZE,
+               .timeout = DFLT_TIMEOUT_VAL,
+               .dma_enabled = 0,
+};
+
+static void __init ssp_uart_init(void)
+{
+       struct spi_board_info spi_info;
+
+       memset(&spi_info, 0, sizeof(spi_info));
+       strncpy(spi_info.modalias, SPI_MODALIAS, sizeof(spi_info.modalias)-1);
+       spi_info.irq = SPI_IRQ;
+       spi_info.bus_num = 0;
+       spi_info.chip_select = 0;
+       spi_info.max_speed_hz = SPI_MAX_SPEED_HZ;
+       spi_info.controller_data = &chip;
+       pr_info("info: SPI bus = %d, name = %16.16s, "
+               "irq = 0x%2x, max_freq = %d, cs = %d\n",
+               spi_info.bus_num,
+               spi_info.modalias,
+               spi_info.irq,
+               spi_info.max_speed_hz,
+               spi_info.chip_select);
+
+       spi_info.mode = SPI_MODE_0;
+       spi_info.platform_data = NULL;
+       spi_register_board_info(&spi_info, 1);
+}
+/* not supported */
+int penwell_otg_query_charging_cap(void *dummy)
+{
+       return -1;
+}
+
+static void __init vp_board_init(void)
+{
+       ssp_uart_init();
+}
+
+arch_initcall(vp_board_init);