wifi: rtw89: correct register definitions of digital CFO and spur elimination
authorEric Huang <echuang@realtek.com>
Fri, 13 Jan 2023 09:06:29 +0000 (17:06 +0800)
committerKalle Valo <kvalo@kernel.org>
Mon, 16 Jan 2023 13:38:11 +0000 (15:38 +0200)
This change fixes the precision of CFO and TX EVM, and it could imporve
performance in some cases. Also, use the correctted definition for 8852A.

Signed-off-by: Eric Huang <echuang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230113090632.60957-2-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/reg.h
drivers/net/wireless/realtek/rtw89/rtw8852a.c

index 578a196..412a691 100644 (file)
 #define R_MUIC 0x40F8
 #define B_MUIC_EN BIT(0)
 #define R_DCFO 0x4264
-#define B_DCFO GENMASK(1, 0)
+#define B_DCFO GENMASK(7, 0)
 #define R_SEG0CSI 0x42AC
-#define B_SEG0CSI_IDX GENMASK(11, 0)
+#define B_SEG0CSI_IDX GENMASK(10, 0)
 #define R_SEG0CSI_EN 0x42C4
 #define B_SEG0CSI_EN BIT(23)
 #define R_BSS_CLR_MAP 0x43ac
index 1800a56..45119c5 100644 (file)
@@ -1035,7 +1035,7 @@ static void rtw8852a_spur_elimination(struct rtw89_dev *rtwdev, u8 central_ch)
                                       0x210);
                rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL,
                                       0x210);
-               rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x7c0);
+               rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, B_SEG0CSI_IDX, 0x7c0);
                rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX,
                                       B_P0_NBIIDX_NOTCH_EN, 0x1);
                rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX,
@@ -1047,7 +1047,7 @@ static void rtw8852a_spur_elimination(struct rtw89_dev *rtwdev, u8 central_ch)
                                       0x210);
                rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL,
                                       0x210);
-               rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x40);
+               rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, B_SEG0CSI_IDX, 0x40);
                rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX,
                                       B_P0_NBIIDX_NOTCH_EN, 0x1);
                rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX,
@@ -1059,7 +1059,7 @@ static void rtw8852a_spur_elimination(struct rtw89_dev *rtwdev, u8 central_ch)
                                       0x2d0);
                rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL,
                                       0x2d0);
-               rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x740);
+               rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, B_SEG0CSI_IDX, 0x740);
                rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX,
                                       B_P0_NBIIDX_NOTCH_EN, 0x1);
                rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX,