RDMA/hns: Fix cmdq parameter of querying pf timer resource

[ Upstream commit 441c88d5b3ff80108ff536c6cf80591187015403 ]

The firmware has reduced the number of descriptions of command
HNS_ROCE_OPC_QUERY_PF_TIMER_RES to 1. The driver needs to adapt, otherwise
the hardware will report error 4(CMD_NEXT_ERR).

Fixes: 0e40dc2f70cd ("RDMA/hns: Add timer allocation support for hip08")
Link: https://lore.kernel.org/r/1588931159-56875-3-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 9a8053b..0502c90 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1349,34 +1349,26 @@ static int hns_roce_query_pf_resource(struct hns_roce_dev *hr_dev)
 static int hns_roce_query_pf_timer_resource(struct hns_roce_dev *hr_dev)
 {
        struct hns_roce_pf_timer_res_a *req_a;
-       struct hns_roce_cmq_desc desc[2];
-       int ret, i;
+       struct hns_roce_cmq_desc desc;
+       int ret;
 
-       for (i = 0; i < 2; i++) {
-               hns_roce_cmq_setup_basic_desc(&desc[i],
-                                             HNS_ROCE_OPC_QUERY_PF_TIMER_RES,
-                                             true);
+       hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_QUERY_PF_TIMER_RES,
+                                     true);
 
-               if (i == 0)
-                       desc[i].flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_NEXT);
-               else
-                       desc[i].flag &= ~cpu_to_le16(HNS_ROCE_CMD_FLAG_NEXT);
-       }
-
-       ret = hns_roce_cmq_send(hr_dev, desc, 2);
+       ret = hns_roce_cmq_send(hr_dev, &desc, 1);
        if (ret)
                return ret;
 
-       req_a = (struct hns_roce_pf_timer_res_a *)desc[0].data;
+       req_a = (struct hns_roce_pf_timer_res_a *)desc.data;
 
        hr_dev->caps.qpc_timer_bt_num =
-                               roce_get_field(req_a->qpc_timer_bt_idx_num,
-                                       PF_RES_DATA_1_PF_QPC_TIMER_BT_NUM_M,
-                                       PF_RES_DATA_1_PF_QPC_TIMER_BT_NUM_S);
+               roce_get_field(req_a->qpc_timer_bt_idx_num,
+                              PF_RES_DATA_1_PF_QPC_TIMER_BT_NUM_M,
+                              PF_RES_DATA_1_PF_QPC_TIMER_BT_NUM_S);
        hr_dev->caps.cqc_timer_bt_num =
-                               roce_get_field(req_a->cqc_timer_bt_idx_num,
-                                       PF_RES_DATA_2_PF_CQC_TIMER_BT_NUM_M,
-                                       PF_RES_DATA_2_PF_CQC_TIMER_BT_NUM_S);
+               roce_get_field(req_a->cqc_timer_bt_idx_num,
+                              PF_RES_DATA_2_PF_CQC_TIMER_BT_NUM_M,
+                              PF_RES_DATA_2_PF_CQC_TIMER_BT_NUM_S);
 
        return 0;
 }