OMAPDSS: Correct DISPC_IRQ bit definitions for LCD3
authorChandrabhanu Mahapatra <cmahapatra@ti.com>
Mon, 27 Aug 2012 08:53:19 +0000 (14:23 +0530)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Mon, 27 Aug 2012 09:25:28 +0000 (12:25 +0300)
The DISPC_IRQ bit definitions pertaining to channel LCD3 as DISPC_IRQ_VSYNC3,
DISPC_IRQ_SYNC_LOST3, DISPC_IRQ_ACBIAS_COUNT_STAT3 AND DISPC_IRQ_FRAMEDONE3
which were incorrectly set in previous LCD3 patches have been corrected here.

Reported-by: Mark Tyler <mark.tyler@ti.com>
Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
include/video/omapdss.h

index b868123..9c7cca3 100644 (file)
 #define DISPC_IRQ_FRAMEDONEWB          (1 << 23)
 #define DISPC_IRQ_FRAMEDONETV          (1 << 24)
 #define DISPC_IRQ_WBBUFFEROVERFLOW     (1 << 25)
-#define DISPC_IRQ_FRAMEDONE3           (1 << 26)
-#define DISPC_IRQ_VSYNC3               (1 << 27)
-#define DISPC_IRQ_ACBIAS_COUNT_STAT3   (1 << 28)
-#define DISPC_IRQ_SYNC_LOST3           (1 << 29)
+#define DISPC_IRQ_SYNC_LOST3           (1 << 27)
+#define DISPC_IRQ_VSYNC3               (1 << 28)
+#define DISPC_IRQ_ACBIAS_COUNT_STAT3   (1 << 29)
+#define DISPC_IRQ_FRAMEDONE3           (1 << 30)
 
 struct omap_dss_device;
 struct omap_overlay_manager;