drm/i915: Stop using pipe_offsets[] for PIPE_MISC*

The PIPE_MISC registers don't exist on pre-bdw hardware,
so there is no point in using pipe_offsets[] for them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230314130255.23273-2-ville.syrjala@linux.intel.com
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0ae084a..a8e6abd 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3519,14 +3519,14 @@
 #define   PIPEMISC_DITHER_TYPE_ST1             REG_FIELD_PREP(PIPEMISC_DITHER_TYPE_MASK, 1)
 #define   PIPEMISC_DITHER_TYPE_ST2             REG_FIELD_PREP(PIPEMISC_DITHER_TYPE_MASK, 2)
 #define   PIPEMISC_DITHER_TYPE_TEMP            REG_FIELD_PREP(PIPEMISC_DITHER_TYPE_MASK, 3)
-#define PIPEMISC(pipe)                 _MMIO_PIPE2(pipe, _PIPE_MISC_A)
+#define PIPEMISC(pipe)                 _MMIO_PIPE(pipe, _PIPE_MISC_A, _PIPE_MISC_B)
 
 #define _PIPE_MISC2_A                                  0x7002C
 #define _PIPE_MISC2_B                                  0x7102C
 #define   PIPE_MISC2_BUBBLE_COUNTER_MASK       REG_GENMASK(31, 24)
 #define   PIPE_MISC2_BUBBLE_COUNTER_SCALER_EN  REG_FIELD_PREP(PIPE_MISC2_BUBBLE_COUNTER_MASK, 80)
 #define   PIPE_MISC2_BUBBLE_COUNTER_SCALER_DIS REG_FIELD_PREP(PIPE_MISC2_BUBBLE_COUNTER_MASK, 20)
-#define PIPE_MISC2(pipe)                                       _MMIO_PIPE2(pipe, _PIPE_MISC2_A)
+#define PIPE_MISC2(pipe)               _MMIO_PIPE(pipe, _PIPE_MISC2_A, _PIPE_MISC2_B)
 
 /* Skylake+ pipe bottom (background) color */
 #define _SKL_BOTTOM_COLOR_A            0x70034