net: ethernet: use phylink_set_10g_modes()

Update three drivers to use the new phylink_set_10g_modes() helper:
Cadence macb, Freescale DPAA2 and Marvell PP2.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index e2730b3..b58297a 100644 (file)
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -547,13 +547,8 @@ static void macb_validate(struct phylink_config *config,
        if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE &&
            (state->interface == PHY_INTERFACE_MODE_NA ||
             state->interface == PHY_INTERFACE_MODE_10GBASER)) {
-               phylink_set(mask, 10000baseCR_Full);
-               phylink_set(mask, 10000baseER_Full);
+               phylink_set_10g_modes(mask);
                phylink_set(mask, 10000baseKR_Full);
-               phylink_set(mask, 10000baseLR_Full);
-               phylink_set(mask, 10000baseLRM_Full);
-               phylink_set(mask, 10000baseSR_Full);
-               phylink_set(mask, 10000baseT_Full);
                if (state->interface != PHY_INTERFACE_MODE_NA)
                        goto out;
        }

diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
index 543c1f2..ef8f0a0 100644 (file)
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -139,12 +139,7 @@ static void dpaa2_mac_validate(struct phylink_config *config,
        case PHY_INTERFACE_MODE_NA:
        case PHY_INTERFACE_MODE_10GBASER:
        case PHY_INTERFACE_MODE_USXGMII:
-               phylink_set(mask, 10000baseT_Full);
-               phylink_set(mask, 10000baseCR_Full);
-               phylink_set(mask, 10000baseSR_Full);
-               phylink_set(mask, 10000baseLR_Full);
-               phylink_set(mask, 10000baseLRM_Full);
-               phylink_set(mask, 10000baseER_Full);
+               phylink_set_10g_modes(mask);
                if (state->interface == PHY_INTERFACE_MODE_10GBASER)
                        break;
                phylink_set(mask, 5000baseT_Full);

diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 94ea6dd..3197526 100644 (file)
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -6301,12 +6301,7 @@ static void mvpp2_phylink_validate(struct phylink_config *config,
        case PHY_INTERFACE_MODE_XAUI:
        case PHY_INTERFACE_MODE_NA:
                if (mvpp2_port_supports_xlg(port)) {
-                       phylink_set(mask, 10000baseT_Full);
-                       phylink_set(mask, 10000baseCR_Full);
-                       phylink_set(mask, 10000baseSR_Full);
-                       phylink_set(mask, 10000baseLR_Full);
-                       phylink_set(mask, 10000baseLRM_Full);
-                       phylink_set(mask, 10000baseER_Full);
+                       phylink_set_10g_modes(mask);
                        phylink_set(mask, 10000baseKR_Full);
                }
                if (state->interface != PHY_INTERFACE_MODE_NA)