drm/i915/irq: add dedicated intel_display_irq_init()

Continue splitting display from the rest.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/45c247c9f5104f3e25bd8913644402a11ec3afaf.1691509966.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index b909814ae02b2717bef32016d6cc14747ceb7ed1..8f144d4d3c398398802e45a25f515330ea94cd64 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -28,6 +28,7 @@
 #include "intel_crtc.h"
 #include "intel_display_debugfs.h"
 #include "intel_display_driver.h"
+#include "intel_display_irq.h"
 #include "intel_display_power.h"
 #include "intel_display_types.h"
 #include "intel_dkl_phy.h"
@@ -177,6 +178,7 @@ void intel_display_driver_early_probe(struct drm_i915_private *i915)
        if (!HAS_DISPLAY(i915))
                return;
 
+       intel_display_irq_init(i915);
        intel_dkl_phy_init(i915);
        intel_color_init_hooks(i915);
        intel_init_cdclk_hooks(i915);

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index e6f172cc665a55b5dceb7ea743df069b17188ef6..168f6d4ce208e046f8394f9431fe649fd21f37e2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1699,3 +1699,20 @@ void gen11_de_irq_postinstall(struct drm_i915_private *dev_priv)
                           GEN11_DISPLAY_IRQ_ENABLE);
 }
 
+void intel_display_irq_init(struct drm_i915_private *i915)
+{
+       i915->drm.vblank_disable_immediate = true;
+
+       /*
+        * Most platforms treat the display irq block as an always-on power
+        * domain. vlv/chv can disable it at runtime and need special care to
+        * avoid writing any of the display block registers outside of the power
+        * domain. We defer setting up the display irqs in this case to the
+        * runtime pm.
+        */
+       i915->display_irqs_enabled = true;
+       if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+               i915->display_irqs_enabled = false;
+
+       intel_hotplug_irq_init(i915);
+}

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 874893f4f16dbdf6f17af5b32969e9a5b7a7a6fa..8a2d069d3aacb07396bad6cefa814a87c5445682 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -78,4 +78,6 @@ void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_
 void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_stats[I915_MAX_PIPES]);
 void i8xx_pipestat_irq_handler(struct drm_i915_private *i915, u16 iir, u32 pipe_stats[I915_MAX_PIPES]);
 
+void intel_display_irq_init(struct drm_i915_private *i915);
+
 #endif /* __INTEL_DISPLAY_IRQ_H__ */

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 512fc0ef94a4c6963f6f4a1e754dba7cc93974f6..1723c215dcf6ffd486b65e1233d28ddf3146aae4 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1343,23 +1343,6 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
        /* pre-gen11 the guc irqs bits are in the upper 16 bits of the pm reg */
        if (HAS_GT_UC(dev_priv) && GRAPHICS_VER(dev_priv) < 11)
                to_gt(dev_priv)->pm_guc_events = GUC_INTR_GUC2HOST << 16;
-
-       if (!HAS_DISPLAY(dev_priv))
-               return;
-
-       dev_priv->drm.vblank_disable_immediate = true;
-
-       /* Most platforms treat the display irq block as an always-on
-        * power domain. vlv/chv can disable it at runtime and need
-        * special care to avoid writing any of the display block registers
-        * outside of the power domain. We defer setting up the display irqs
-        * in this case to the runtime pm.
-        */
-       dev_priv->display_irqs_enabled = true;
-       if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
-               dev_priv->display_irqs_enabled = false;
-
-       intel_hotplug_irq_init(dev_priv);
 }
 
 /**