ixgbe: Change the 82599 PHY DSP restart logic

When reprogramming the 82599 analog PHY to either SFI optical or Direct
Attach Twinax, we need to restart the DSP in the PHY.  The current method
can cause contention with our FW which is managing PHY state, and will
cause unexpected link flaps.  This patch fixes the DSP restart by issuing
an AN_RESTART in the MAC, which will properly propagate the DSP restart to
the PHY.  This ensures we don't collide with the FW.

Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c
index 5d27830..a7611bb 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ixgbe/ixgbe_82599.c
@@ -122,10 +122,9 @@ s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
                        IXGBE_WRITE_FLUSH(hw);
                        hw->eeprom.ops.read(hw, ++data_offset, &data_value);
                }
-               /* Now restart DSP */
-               IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000102);
-               IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000b1d);
-               IXGBE_WRITE_FLUSH(hw);
+               /* Now restart DSP by setting Restart_AN */
+               IXGBE_WRITE_REG(hw, IXGBE_AUTOC,
+                   (IXGBE_READ_REG(hw, IXGBE_AUTOC) | IXGBE_AUTOC_AN_RESTART));
 
                /* Release the semaphore */
                ixgbe_release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);