drm/i915: Disable TRAINING_PATTERN_SET before stopping the TPS transmission

DP spec says:
"The Source device shall start sending the idle pattern after
 it has cleared the Training_Pattern byte in the DPCD."

Currently we do these in operations in the opposite order.
Swap them around to match the spec.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210118162107.18424-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index d8c6d70..2d3396b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -697,9 +697,9 @@ static bool intel_dp_disable_dpcd_training_pattern(struct intel_dp *intel_dp,
  * @intel_dp: DP struct
  * @crtc_state: state for CRTC attached to the encoder
  *
- * Stop the link training of the @intel_dp port, disabling the test pattern
- * symbol generation on the port and disabling the training pattern in
- * the sink's DPCD.
+ * Stop the link training of the @intel_dp port, disabling the training
+ * pattern in the sink's DPCD, and disabling the test pattern symbol
+ * generation on the port.
  *
  * What symbols are output on the port after this point is
  * platform specific: On DDI/VLV/CHV platforms it will be the idle pattern
@@ -713,10 +713,9 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp,
 {
        intel_dp->link_trained = true;
 
-       intel_dp_program_link_training_pattern(intel_dp,
-                                              crtc_state,
-                                              DP_TRAINING_PATTERN_DISABLE);
        intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX);
+       intel_dp_program_link_training_pattern(intel_dp, crtc_state,
+                                              DP_TRAINING_PATTERN_DISABLE);
 }
 
 static bool