EDAC/skx_common: Add ChipSelect ADXL component
authorQiuxu Zhuo <qiuxu.zhuo@intel.com>
Fri, 22 Jul 2022 23:33:35 +0000 (16:33 -0700)
committerTony Luck <tony.luck@intel.com>
Fri, 23 Sep 2022 19:33:08 +0000 (12:33 -0700)
Each pseudo channel of HBM has its own retry_rd_err_log registers.
The bit 0 of ChipSelect ADXL component encodes the pseudo channel
number of HBM memory. So add ChipSelect ADXL component to get HBM
pseudo channel number.

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
drivers/edac/skx_common.c
drivers/edac/skx_common.h

index 7276ce3a33e14cbfb6f3ee124a127b039d1f9b85..f0f8e98f6efb289f0c415be7885f7473e65b8ca3 100644 (file)
@@ -27,9 +27,11 @@ static const char * const component_names[] = {
        [INDEX_MEMCTRL]         = "MemoryControllerId",
        [INDEX_CHANNEL]         = "ChannelId",
        [INDEX_DIMM]            = "DimmSlotId",
+       [INDEX_CS]              = "ChipSelect",
        [INDEX_NM_MEMCTRL]      = "NmMemoryControllerId",
        [INDEX_NM_CHANNEL]      = "NmChannelId",
        [INDEX_NM_DIMM]         = "NmDimmSlotId",
+       [INDEX_NM_CS]           = "NmChipSelect",
 };
 
 static int component_indices[ARRAY_SIZE(component_names)];
@@ -139,10 +141,13 @@ static bool skx_adxl_decode(struct decoded_addr *res, bool error_in_1st_level_me
                               (int)adxl_values[component_indices[INDEX_NM_CHANNEL]] : -1;
                res->dimm    = (adxl_nm_bitmap & BIT_NM_DIMM) ?
                               (int)adxl_values[component_indices[INDEX_NM_DIMM]] : -1;
+               res->cs      = (adxl_nm_bitmap & BIT_NM_CS) ?
+                              (int)adxl_values[component_indices[INDEX_NM_CS]] : -1;
        } else {
                res->imc     = (int)adxl_values[component_indices[INDEX_MEMCTRL]];
                res->channel = (int)adxl_values[component_indices[INDEX_CHANNEL]];
                res->dimm    = (int)adxl_values[component_indices[INDEX_DIMM]];
+               res->cs      = (int)adxl_values[component_indices[INDEX_CS]];
        }
 
        if (res->imc > NUM_IMC - 1 || res->imc < 0) {
index c542f15628250d4cfb822727cc03c60b36303528..167760fd75ba9cd7882c2b4757b99e36d8e3be7b 100644 (file)
@@ -112,16 +112,19 @@ enum {
        INDEX_MEMCTRL,
        INDEX_CHANNEL,
        INDEX_DIMM,
+       INDEX_CS,
        INDEX_NM_FIRST,
        INDEX_NM_MEMCTRL = INDEX_NM_FIRST,
        INDEX_NM_CHANNEL,
        INDEX_NM_DIMM,
+       INDEX_NM_CS,
        INDEX_MAX
 };
 
 #define BIT_NM_MEMCTRL BIT_ULL(INDEX_NM_MEMCTRL)
 #define BIT_NM_CHANNEL BIT_ULL(INDEX_NM_CHANNEL)
 #define BIT_NM_DIMM    BIT_ULL(INDEX_NM_DIMM)
+#define BIT_NM_CS      BIT_ULL(INDEX_NM_CS)
 
 struct decoded_addr {
        struct mce *mce;
@@ -134,6 +137,7 @@ struct decoded_addr {
        int     sktways;
        int     chanways;
        int     dimm;
+       int     cs;
        int     rank;
        int     channel_rank;
        u64     rank_address;