[965] Allow draw or depth regions to be NULL.

With FBOs, we end up wanting to do 3D metaops against one or the other without
having to find the other one to fill in if we're not going to draw to it.

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 6dc6c07..3143c82 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -233,37 +233,48 @@ static void upload_depthbuffer(struct brw_context *brw)
    struct intel_context *intel = &brw->intel;
    struct intel_region *region = brw->state.depth_region;
 
-   unsigned int format;
-
-   switch (region->cpp) {
-   case 2:
-      format = BRW_DEPTHFORMAT_D16_UNORM;
-      break;
-   case 4:
-      if (intel->depth_buffer_is_float)
-        format = BRW_DEPTHFORMAT_D32_FLOAT;
-      else
-        format = BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
-      break;
-   default:
-      assert(0);
-      return;
+   if (region == NULL) {
+      BEGIN_BATCH(5, INTEL_BATCH_NO_CLIPRECTS);
+      OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (5 - 2));
+      OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
+               (BRW_SURFACE_NULL << 29));
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      ADVANCE_BATCH();
+   } else {
+      unsigned int format;
+
+      switch (region->cpp) {
+      case 2:
+        format = BRW_DEPTHFORMAT_D16_UNORM;
+        break;
+      case 4:
+        if (intel->depth_buffer_is_float)
+           format = BRW_DEPTHFORMAT_D32_FLOAT;
+        else
+           format = BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
+        break;
+      default:
+        assert(0);
+        return;
+      }
+
+      BEGIN_BATCH(5, INTEL_BATCH_NO_CLIPRECTS);
+      OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (5 - 2));
+      OUT_BATCH(((region->pitch * region->cpp) - 1) |
+               (format << 18) |
+               (BRW_TILEWALK_YMAJOR << 26) |
+               (region->tiled << 27) |
+               (BRW_SURFACE_2D << 29));
+      OUT_RELOC(region->buffer,
+               DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
+      OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
+               ((region->pitch - 1) << 6) |
+               ((region->height - 1) << 19));
+      OUT_BATCH(0);
+      ADVANCE_BATCH();
    }
-
-   BEGIN_BATCH(5, INTEL_BATCH_NO_CLIPRECTS);
-   OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (5 - 2));
-   OUT_BATCH(((region->pitch * region->cpp) - 1) |
-            (format << 18) |
-            (BRW_TILEWALK_YMAJOR << 26) |
-            (region->tiled << 27) |
-            (BRW_SURFACE_2D << 29));
-   OUT_RELOC(region->buffer,
-            DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
-   OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
-            ((region->pitch - 1) << 6) |
-            ((region->height - 1) << 19));
-   OUT_BATCH(0);
-   ADVANCE_BATCH();
 }
 
 const struct brw_tracked_state brw_depthbuffer = {

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index e361ab5..efec0e7 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -172,7 +172,7 @@ brw_create_texture_surface( struct brw_context *brw,
    surf.ss2.height = key->height - 1;
 
    surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
-   surf.ss3.tiled_surface = key->tiled; /* always zero */
+   surf.ss3.tiled_surface = key->tiled;
    surf.ss3.pitch = (key->pitch * key->cpp) - 1;
    surf.ss3.depth = key->depth - 1;
 
@@ -273,15 +273,31 @@ static void upload_wm_surfaces(struct brw_context *brw )
    {
       struct brw_surface_state surf;
       struct intel_region *region = brw->state.draw_region;
+      dri_bo *region_bo;
 
       memset(&surf, 0, sizeof(surf));
 
-      if (region->cpp == 4)
-        surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
-      else 
-        surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
+      if (region != NULL) {
+        if (region->cpp == 4)
+           surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+        else
+           surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
+
+        surf.ss0.surface_type = BRW_SURFACE_2D;
 
-      surf.ss0.surface_type = BRW_SURFACE_2D;
+        surf.ss1.base_addr = region->buffer->offset; /* reloc */
+
+        surf.ss2.width = region->pitch - 1; /* XXX: not really! */
+        surf.ss2.height = region->height - 1;
+        surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
+        surf.ss3.tiled_surface = region->tiled;
+        surf.ss3.pitch = (region->pitch * region->cpp) - 1;
+        region_bo = region->buffer;
+      } else {
+        surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+        surf.ss0.surface_type = BRW_SURFACE_NULL;
+        region_bo = NULL;
+      }
 
       /* _NEW_COLOR */
       surf.ss0.color_blend = (!brw->attribs.Color->_LogicOpEnabled &&
@@ -293,18 +309,10 @@ static void upload_wm_surfaces(struct brw_context *brw )
       surf.ss0.writedisable_blue =  !brw->attribs.Color->ColorMask[2];
       surf.ss0.writedisable_alpha = !brw->attribs.Color->ColorMask[3];
 
-      surf.ss1.base_addr = region->buffer->offset; /* reloc */
-
-      surf.ss2.width = region->pitch - 1; /* XXX: not really! */
-      surf.ss2.height = region->height - 1;
-      surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
-      surf.ss3.tiled_surface = region->tiled;
-      surf.ss3.pitch = (region->pitch * region->cpp) - 1;
-
       /* Key size will never match key size for textures, so we're safe. */
       dri_bo_unreference(brw->wm.surf_bo[0]);
       brw->wm.surf_bo[0] = brw_cache_data( &brw->cache, BRW_SS_SURFACE, &surf,
-                                          &region->buffer, 1 );
+                                          &region_bo, 1 );
 
       brw->wm.nr_surfaces = 1;
    }
@@ -343,11 +351,13 @@ static void emit_reloc_wm_surfaces(struct brw_context *brw)
    int unit, i;
 
    /* Emit SS framebuffer relocation */
-   dri_emit_reloc(brw->wm.surf_bo[0],
-                 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE,
-                 0,
-                 offsetof(struct brw_surface_state, ss1),
-                 brw->state.draw_region->buffer);
+   if (brw->state.draw_region != NULL) {
+      dri_emit_reloc(brw->wm.surf_bo[0],
+                    DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE,
+                    0,
+                    offsetof(struct brw_surface_state, ss1),
+                    brw->state.draw_region->buffer);
+   }
 
    /* Emit SS relocations for texture buffers */
    for (unit = 0; unit < BRW_MAX_TEX_UNIT; unit++) {