anv: fix 3DSTATE_PS emission in generation shaders
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Tue, 3 Jan 2023 00:50:54 +0000 (02:50 +0200)
committerMarge Bot <emma+marge@anholt.net>
Fri, 3 Mar 2023 11:30:54 +0000 (11:30 +0000)
We have to use the helper and also were missing the vector mask
programming.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

src/intel/vulkan/genX_cmd_draw_generated_indirect.h

index 6181c39..86c7489 100644 (file)
@@ -29,6 +29,8 @@
 
 #include "util/macros.h"
 
+#include "common/intel_genX_state.h"
+
 #include "anv_private.h"
 #include "anv_generated_indirect_draws.h"
 
@@ -331,14 +333,16 @@ genX(cmd_buffer_emit_generate_draws)(struct anv_cmd_buffer *cmd_buffer,
       brw_wm_prog_data_const(draw_kernel->prog_data);
 
    anv_batch_emit(batch, GENX(3DSTATE_PS), ps) {
+      intel_set_ps_dispatch_state(&ps, device->info, prog_data,
+                                  1 /* rasterization_samples */,
+                                  0 /* msaa_flags */);
+
+      ps.VectorMaskEnable       = prog_data->uses_vmask;
+
       ps.BindingTableEntryCount = 0;
       ps.PushConstantEnable     = prog_data->base.nr_params > 0 ||
                                   prog_data->base.ubo_ranges[0].length;
 
-      ps._8PixelDispatchEnable = prog_data->dispatch_8;
-      ps._16PixelDispatchEnable = prog_data->dispatch_16;
-      ps._32PixelDispatchEnable = prog_data->dispatch_32;
-
       ps.DispatchGRFStartRegisterForConstantSetupData0 =
          brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);
       ps.DispatchGRFStartRegisterForConstantSetupData1 =