nand: brcmnand: add bcm68360 support

This adds the nand support for chipset bcm68360.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 5de72fb..7814d84 100644 (file)
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -78,6 +78,12 @@ config NAND_BRCMNAND_6368
        help
          Enable support for broadcom nand driver on bcm6368.
 
+config NAND_BRCMNAND_68360
+       bool "Support Broadcom NAND controller on bcm68360"
+       depends on NAND_BRCMNAND && ARCH_BCM68360
+       help
+         Enable support for broadcom nand driver on bcm68360.
+
 config NAND_BRCMNAND_6838
        bool "Support Broadcom NAND controller on bcm6838"
        depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838

diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile
index 7e70b85..5d9e7e3 100644 (file)
--- a/drivers/mtd/nand/raw/brcmnand/Makefile
+++ b/drivers/mtd/nand/raw/brcmnand/Makefile
@@ -2,6 +2,7 @@
 
 obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o
+obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o
 obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o

diff --git a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
new file mode 100644 (file)
index 0000000..0f1a28e
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm68360_nand_soc {
+       struct brcmnand_soc soc;
+       void __iomem *base;
+};
+
+#define BCM68360_NAND_INT              0x00
+#define BCM68360_NAND_STATUS_SHIFT     0
+#define BCM68360_NAND_STATUS_MASK      (0xfff << BCM68360_NAND_STATUS_SHIFT)
+
+#define BCM68360_NAND_INT_EN           0x04
+#define BCM68360_NAND_ENABLE_SHIFT     0
+#define BCM68360_NAND_ENABLE_MASK      (0xffff << BCM68360_NAND_ENABLE_SHIFT)
+
+enum {
+       BCM68360_NP_READ                = BIT(0),
+       BCM68360_BLOCK_ERASE    = BIT(1),
+       BCM68360_COPY_BACK      = BIT(2),
+       BCM68360_PAGE_PGM       = BIT(3),
+       BCM68360_CTRL_READY     = BIT(4),
+       BCM68360_DEV_RBPIN      = BIT(5),
+       BCM68360_ECC_ERR_UNC    = BIT(6),
+       BCM68360_ECC_ERR_CORR   = BIT(7),
+};
+
+static bool bcm68360_nand_intc_ack(struct brcmnand_soc *soc)
+{
+       struct bcm68360_nand_soc *priv =
+                       container_of(soc, struct bcm68360_nand_soc, soc);
+       void __iomem *mmio = priv->base + BCM68360_NAND_INT;
+       u32 val = brcmnand_readl(mmio);
+
+       if (val & (BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT)) {
+               /* Ack interrupt */
+               val &= ~BCM68360_NAND_STATUS_MASK;
+               val |= BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT;
+               brcmnand_writel(val, mmio);
+               return true;
+       }
+
+       return false;
+}
+
+static void bcm68360_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+       struct bcm68360_nand_soc *priv =
+                       container_of(soc, struct bcm68360_nand_soc, soc);
+       void __iomem *mmio = priv->base + BCM68360_NAND_INT_EN;
+       u32 val = brcmnand_readl(mmio);
+
+       /* Don't ack any interrupts */
+       val &= ~BCM68360_NAND_STATUS_MASK;
+
+       if (en)
+               val |= BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT;
+       else
+               val &= ~(BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT);
+
+       brcmnand_writel(val, mmio);
+}
+
+static int bcm68360_nand_probe(struct udevice *dev)
+{
+       struct udevice *pdev = dev;
+       struct bcm68360_nand_soc *priv = dev_get_priv(dev);
+       struct brcmnand_soc *soc;
+       struct resource res;
+
+       soc = &priv->soc;
+
+       dev_read_resource_byname(pdev, "nand-int-base", &res);
+       priv->base = devm_ioremap(dev, res.start, resource_size(&res));
+       if (IS_ERR(priv->base))
+               return PTR_ERR(priv->base);
+
+       soc->ctlrdy_ack = bcm68360_nand_intc_ack;
+       soc->ctlrdy_set_enabled = bcm68360_nand_intc_set;
+
+       /* Disable and ack all interrupts  */
+       brcmnand_writel(0, priv->base + BCM68360_NAND_INT_EN);
+       brcmnand_writel(0, priv->base + BCM68360_NAND_INT);
+
+       return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm68360_nand_dt_ids[] = {
+       {
+               .compatible = "brcm,nand-bcm68360",
+       },
+       { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm68360_nand) = {
+       .name = "bcm68360-nand",
+       .id = UCLASS_MTD,
+       .of_match = bcm68360_nand_dt_ids,
+       .probe = bcm68360_nand_probe,
+       .priv_auto_alloc_size = sizeof(struct bcm68360_nand_soc),
+};
+
+void board_nand_init(void)
+{
+       struct udevice *dev;
+       int ret;
+
+       ret = uclass_get_device_by_driver(UCLASS_MTD,
+                                         DM_GET_DRIVER(bcm68360_nand), &dev);
+       if (ret && ret != -ENODEV)
+               pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+                      ret);
+}