powerpc/85xx: disable timebase synchronization under the hypervisor
authorTimur Tabi <timur@freescale.com>
Tue, 14 Jun 2011 13:04:33 +0000 (13:04 +0000)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 27 Jun 2011 13:36:19 +0000 (08:36 -0500)
The Freescale hypervisor does not allow guests to write to the timebase
registers (virtualizing the timebase register was deemed too complicated),
so don't try to synchronize the timebase registers when we're running
under the hypervisor.

This typically happens when kexec support is enabled.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/platforms/85xx/p3041_ds.c
arch/powerpc/platforms/85xx/p4080_ds.c
arch/powerpc/platforms/85xx/p5020_ds.c

index 1fcd233..96d99a3 100644 (file)
@@ -40,6 +40,9 @@
 static int __init p3041_ds_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+       extern struct smp_ops_t smp_85xx_ops;
+#endif
 
        if (of_flat_dt_is_compatible(root, "fsl,P3041DS"))
                return 1;
@@ -51,6 +54,14 @@ static int __init p3041_ds_probe(void)
                ppc_md.restart = fsl_hv_restart;
                ppc_md.power_off = fsl_hv_halt;
                ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+               /*
+                * Disable the timebase sync operations because we can't write
+                * to the timebase registers under the hypervisor.
+                 */
+               smp_85xx_ops.give_timebase = NULL;
+               smp_85xx_ops.take_timebase = NULL;
+#endif
                return 1;
        }
 
index 430c8f9..d1b21d7 100644 (file)
@@ -39,6 +39,9 @@
 static int __init p4080_ds_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+       extern struct smp_ops_t smp_85xx_ops;
+#endif
 
        if (of_flat_dt_is_compatible(root, "fsl,P4080DS"))
                return 1;
@@ -50,6 +53,14 @@ static int __init p4080_ds_probe(void)
                ppc_md.restart = fsl_hv_restart;
                ppc_md.power_off = fsl_hv_halt;
                ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+               /*
+                * Disable the timebase sync operations because we can't write
+                * to the timebase registers under the hypervisor.
+                 */
+               smp_85xx_ops.give_timebase = NULL;
+               smp_85xx_ops.take_timebase = NULL;
+#endif
                return 1;
        }
 
index f7220d4..e8cba50 100644 (file)
@@ -40,6 +40,9 @@
 static int __init p5020_ds_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+       extern struct smp_ops_t smp_85xx_ops;
+#endif
 
        if (of_flat_dt_is_compatible(root, "fsl,P5020DS"))
                return 1;
@@ -51,6 +54,14 @@ static int __init p5020_ds_probe(void)
                ppc_md.restart = fsl_hv_restart;
                ppc_md.power_off = fsl_hv_halt;
                ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+               /*
+                * Disable the timebase sync operations because we can't write
+                * to the timebase registers under the hypervisor.
+                 */
+               smp_85xx_ops.give_timebase = NULL;
+               smp_85xx_ops.take_timebase = NULL;
+#endif
                return 1;
        }