hdmitx: update pll parameters of 5.934G

PD#164877: hdmitx: update pll parameters of 5.934G

Change-Id: Ifb7305b1a2445894ba5acac124375444438012bf
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>

diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c
index 4900e8c54c9cd1bc5d45c168dbccf71bd0f709cb..3e8e4bc4355e63b06af56d1e7cd04da36a549ca2 100644 (file)
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c
@@ -333,7 +333,6 @@ static struct frac_rate_table fr_tab[] = {
 static void recalc_vinfo_sync_duration(struct vinfo_s *info, unsigned int frac)
 {
        struct frac_rate_table *fr = &fr_tab[0];
-       struct hdmitx_dev *hdev = &hdmitx_device;
 
        pr_info(SYS "recalc before %s %d %d\n", info->name,
                info->sync_duration_num, info->sync_duration_den);
@@ -347,19 +346,6 @@ static void recalc_vinfo_sync_duration(struct vinfo_s *info, unsigned int frac)
                                info->sync_duration_num = fr->sync_num_int;
                                info->sync_duration_den = fr->sync_den_int;
                        }
-
-                       if (hdev->chip_type == MESON_CPU_ID_G12A)
-                               if ((hdev->cur_VIC ==
-                                               HDMI_3840x2160p60_16x9) ||
-                                       (hdev->cur_VIC ==
-                                               HDMI_4096x2160p60_256x135))
-                                       if (hdev->para->cs !=
-                                               COLORSPACE_YUV420) {
-                                               info->sync_duration_num
-                                                       = fr->sync_num_int;
-                                               info->sync_duration_den
-                                                       = fr->sync_den_int;
-                                       }
                        break;
                }
                fr++;

diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
index 2fd19954dd9d38c6de1c64b2413e6c4188419410..445ce55e1b94e798dfa723ee5a8fc2d2f9185598 100644 (file)
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
@@ -999,15 +999,9 @@ static void hdmitx_check_frac_rate(struct hdmitx_dev *hdev)
 
        frac_rate = hdev->frac_rate_policy;
        para = hdmi_get_fmt_paras(vic);
-       if (para && (para->name) && likely_frac_rate_mode(para->name)) {
-               if (hdev->chip_type == MESON_CPU_ID_G12A)
-                       if ((vic == HDMI_3840x2160p60_16x9) ||
-                               (vic == HDMI_4096x2160p60_256x135))
-                               if (para->cs != COLORSPACE_YUV420) {
-                                       pr_info("g12a 6GHz doesn't have frac_rate\n");
-                                       frac_rate = 0;
-                               }
-       } else {
+       if (para && (para->name) && likely_frac_rate_mode(para->name))
+               ;
+       else {
                pr_info("%s doesn't have frac_rate\n", para->name);
                frac_rate = 0;
        }

diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c
index 19186bb45b0587e3f853a7699df10223a4e2622a..47881ffbf1dedc1a4d8311cd1b390ca3e443fe6c 100644 (file)
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c
@@ -16,6 +16,7 @@
  */
 
 #include <linux/printk.h>
+#include <linux/amlogic/media/vout/hdmi_tx/hdmi_tx_module.h>
 #include "common.h"
 #include "mach_reg.h"
 
@@ -90,16 +91,26 @@
 static bool set_hpll_hclk_v1(unsigned int m, unsigned int frac_val)
 {
        int ret = 0;
+       struct hdmitx_dev *hdev = get_hdmitx_device();
 
        hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x0b3a0400 | (m & 0xff));
        hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x3, 28, 2);
        hd_write_reg(P_HHI_HDMI_PLL_CNTL1, frac_val);
+       hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000);
+
        if (frac_val == 0x8148) {
-               hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000);
-               hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x6a685c00);
-               hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x44331290);
+               if (((hdev->para->vic == HDMI_3840x2160p50_16x9) ||
+                       (hdev->para->vic == HDMI_3840x2160p60_16x9) ||
+                       (hdev->para->vic == HDMI_3840x2160p50_64x27) ||
+                       (hdev->para->vic == HDMI_3840x2160p60_64x27)) &&
+                       (hdev->para->cs != COLORSPACE_YUV420)) {
+                       hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x6a685c00);
+                       hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x11551293);
+               } else {
+                       hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x6a685c00);
+                       hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x44331290);
+               }
        } else {
-               hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000);
                hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x6a68dc00);
                hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x65771290);
        }
@@ -160,9 +171,9 @@ void set_g12a_hpll_clk_out(unsigned int frac_rate, unsigned int clk)
        case 5940000:
                if (set_hpll_hclk_v1(0xf7, frac_rate ? 0x8148 : 0x10000))
                        break;
-               else if (set_hpll_hclk_v2(0x7b, frac_rate ? 0x140b4 : 0x18000))
+               else if (set_hpll_hclk_v2(0x7b, 0x18000))
                        break;
-               else if (set_hpll_hclk_v3(0xf7, frac_rate ? 0x8148 : 0x10000))
+               else if (set_hpll_hclk_v3(0xf7, 0x10000))
                        break;
                else
                        break;